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  mcr-2-u-u Datasheet PDF File

For mcr-2-u-u Found Datasheets File :: 245    Search Time::3.969ms    
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    XR16M680IB25 XR16M680IM48 XR16M680 XR16M680IL32

Exar Corporation
Part No. XR16M680IB25 XR16M680IM48 XR16M680 XR16M680IL32
OCR Text ...through the software setting of MCR[3]. INT is set to the active mode when MCR[3] is set to a logic 1. INT is set to the three state mode wh...2 1 B2 I RESET (RESET#) 23 35 A2 I VCC GND GND 28 13 Center Pad 42 ...
Description 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO

File Size 423.89K  /  57 Page

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    XR16M780IL32 XR16M780IM48 XR16M780 XR16M780IB25

Exar Corporation
Part No. XR16M780IL32 XR16M780IM48 XR16M780 XR16M780IB25
OCR Text ...through the software setting of MCR[3]. INT is set to the active mode when MCR[3] is set to a logic 1. INT is set to the three state mode wh...2 1 B2 I RESET (RESET#) 23 35 A2 I VCC GND GND 28 13 Center Pad 42 ...
Description 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO

File Size 432.76K  /  58 Page

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    XR16M2750IM48 XR16M2750IL32 XR16M2750IM48-F

Exar Corporation
Part No. XR16M2750IM48 XR16M2750IL32 XR16M2750IM48-F
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output LOW when MCR[3] is set to a logic 1. INTA is set to ...2. If it is not used, leave it unconnected. UART channel A Receiver Ready (active low). This output ...
Description 1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

File Size 391.00K  /  53 Page

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    XR16M580IM48 XR16M580IB25 XR16M580 XR16M580IL32

Exar Corporation
Part No. XR16M580IM48 XR16M580IB25 XR16M580 XR16M580IL32
OCR Text ...through the software setting of MCR[3]. INT is set to the active mode when MCR[3] is set to a logic 1. INT is set to the three state mode wh...2 1 B2 I RESET (RESET#) 23 35 A2 I VCC GND GND 28 13 Center Pad 42 ...
Description 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO

File Size 420.61K  /  56 Page

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    EXAR[Exar Corporation]
Part No. XR16V2651IM XR16V2651_07 XR16V2651 XR16V2651IL32
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output to a logic 0 when MCR[3] is set to a logic 1. INTA i...2 TXRDYA# - 43 O RXRDYA# - 31 O TXRDYB# - 6 O RXRDYB# - ...
Description HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE

File Size 499.21K  /  51 Page

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    XR16V27500709

Exar Corporation
Part No. XR16V27500709
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output LOW when MCR[3] is set to a logic 1. INTA is set to ...2. If it is not used, leave it unconnected. UART channel A Receiver Ready (active low). This output ...
Description HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

File Size 389.64K  /  52 Page

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    XR16V27510709

Exar Corporation
Part No. XR16V27510709
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output to a logic 0 when MCR[3] is set to a logic 1. INTA i...2]. If this pin is not used, tie it to VCC or pull it high via a 100k ohm resistor. UART channel A R...
Description HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE

File Size 410.41K  /  52 Page

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    Exar
Part No. XR16L2551
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output to a logic 0 when MCR[3] is set to a logic 1. INTA i...2 Channel A - The output state is defined by the user and through the software setting of MCR[3]. IN...
Description LOW VOLTAGE DUART WITH POWERSAVE

File Size 308.26K  /  49 Page

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    XR16V2650IL32 XR16V2650IM XR16V2650

EXAR[Exar Corporation]
Part No. XR16V2650IL32 XR16V2650IM XR16V2650
OCR Text ...through the software setting of MCR[3]. INTA is set to the active mode and OP2A# output LOW when MCR[3] is set to a logic 1. INTA is set to ...2. If it is not used, leave it unconnected. UART channel A Receiver Ready (active low). This output ...
Description HIGH PERFORMANCE DUART WITH 32-BYTE FIFO

File Size 366.21K  /  47 Page

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    XR16M275207 XR16M2752IL32 XR16M2752IJ44

Exar Corporation
Part No. XR16M275207 XR16M2752IL32 XR16M2752IJ44
OCR Text ...ceive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be HIGH during reset or idle (no data). Infrared IrDA transmit ...2]. If this pin is not used, tie it to VCC or pull it high via a 100k ohm resistor. UART channel A R...
Description 1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO

File Size 404.68K  /  51 Page

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For mcr-2-u-u Found Datasheets File :: 245    Search Time::3.969ms    
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