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Integrated Silicon Solution Inc
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Part No. |
42S16400A IS42S16400A
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OCR Text |
Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
FEATURES
* Clock frequency:166, 133, 100 MHz * Fully synchronous; all signa...ARRAY
11
ROW ADDRESS LATCH
11
ROW ADDRESS BUFFER
BANK 0
SENSE AMP I/O GATE
COLU... |
Description |
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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File Size |
472.00K /
55 Page |
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it Online |
Download Datasheet |
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ISSI
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Part No. |
IS42S16400
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OCR Text |
...sing edge of the clock input. 1 meg bits x 16 bits x 4 banks (64-mbit) synchronous dynamic ram final production may 2001 pin configurations ...array bank 0 sense amp i/o gate bank control logic row address buffer functional block diagram
is4... |
Description |
1M-Bit x 16-Bit 4 4-Bank SDRAM
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File Size |
596.83K /
54 Page |
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it Online |
Download Datasheet |
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ISSI
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Part No. |
IS42S16400C
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OCR Text |
...ing edge of the clock input. 64 meg bits x 16 bits x 4 banks (64-mbit) synchronous dynamic ram august 2004 pin configurations 54-pin tsop (t...array bank 0 sense amp i/o gate bank control logic row address buffer functional block diagram
is4... |
Description |
64M-Bit x 16-Bit 4 4-Bank SDRAM
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File Size |
506.55K /
55 Page |
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it Online |
Download Datasheet |
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Integrated Silicon Solution Inc
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Part No. |
IS42S16400B-6T IS42S16400B-6TL IS42S16400B-7T IS42S16400B-7TL
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OCR Text |
...sing edge of the clock input. 1 meg bits x 16 bits x 4 banks (64-mbit) synchronous dynamic ram february 2005 pin configurations 54-pin tsop ...array bank 0 sense amp i/o gate bank control logic row address buffer functional block diagram
is4... |
Description |
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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File Size |
470.86K /
55 Page |
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it Online |
Download Datasheet |
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Integrated Silicon Solu...
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Part No. |
IS61NLP51236 IS61NVP25672-200B1
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OCR Text |
...ee available description the 18 meg 'nlp/nvp' product family feature high-speed, low-power synchronous static rams designed to provide a bur...array write address register write address register control logic output register buffer address reg... |
Description |
256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
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File Size |
281.10K /
35 Page |
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it Online |
Download Datasheet |
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Price and Availability
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