AD539: Wideband Dual-Channel Linear multiplier/divider Data Sheet (Rev. A. 12/91) Quad 12-bit 125MSPS ADC with serialized LVDS output 64-VQFN -40 to 85 diODE ZENER SINGLE 350mW 8.7Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-23 3K/REEL DUAL ANALOG multiplier OR diVIDER, 60 MHz BAND WIDTH, CdiP16 Wideband Dual-Channel Linear multiplier/divider DUAL ANALOG multiplier OR diVIDER, 60 MHz BAND WIDTH, CdiP16
High Frequency Clock multiplier 80 MHz, OTHER CLOCK GENERATOR, PDSO8 High Frequency Clock multiplier(高频时钟乘法器(掩摸可编程单片模拟锁相环设备 Preprogrammed High Speed Frequency multiplier