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For prr Found Datasheets File :: 4645    Search Time::1.937ms    
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    HD74HCT137 HD74HCT137FPEL HD74HCT137RPEL

Renesas Electronics Corporation
Part No. HD74HCT137 HD74HCT137FPEL HD74HCT137RPEL
OCR Text ...HL Notes: 1. Input waveform: prr 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. The output are measured one at a time with one transition per measurement. * Waveform - 2 6 ns 6 ns 90% 1.3 V 10% 10% G2 90% 1.3 V VCC 0V tPHL 90% ...
Description 3-to-8-line Decoder/Demultiplexer with Address Latch

File Size 185.79K  /  8 Page

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    HD26C31FPEL HD26C31

Renesas Electronics Corporation
Part No. HD26C31FPEL HD26C31
OCR Text ...s, t f 6 ns 2. Input waveforms: prr = 1 MHz, duty cycle 50% Rev.2.00, Jul.16.2004, page 5 of 11 HD26C31 Test Circuit 2 VCC VCC Output A Input R1 R3 1.5 V S1 CLOSED R2 Y C1 Z C2 C3 Output Pulse Generater Zout = 50 G G ...
Description ASSP>ICs for Interface
Quadruple Differential Line Drivers With 3 State Outputs

File Size 156.49K  /  12 Page

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    HD74HC259FPEL HD74HC259RPEL HD74HC259P

Renesas Electronics Corporation
Part No. HD74HC259FPEL HD74HC259RPEL HD74HC259P
OCR Text ... tTHL Notes : 1. Input pulse : prr 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. D = VCC , Unaddressed Q = L * Waveform - 2 tr Data 10% 90% 50% 90% 50% 10% tf VCC 0V tPLH 90% tPHL 90% 50% 10% VOH VOL Output Q 50% 10% ...
Description 8-bit Addressable Latch

File Size 98.71K  /  10 Page

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    AVR1010

ATMEL Corporation
Part No. AVR1010
OCR Text ...the power reduction r egisters (prr), which causes them to be disconnected from the peripheral clock domai n. it is required to disable modules and peripherals via their respective control registers before setting their prr bit, for the ...
Description Minimizing the power consumption of Atmel AVR XMEGA devices

File Size 203.76K  /  13 Page

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    HD74HC597FPEL HD74HC597 HD74HC597P

Renesas Electronics Corporation
Part No. HD74HC597FPEL HD74HC597 HD74HC597P
OCR Text ...L Note : 1. Input waveform : prr 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns * Waveform - 2 (RCK to Q) tr Input SCK 10 % 90 % 50 % 50 % tf VCC 50 % 10 % tw(H) t PLH 90 % tw(L) t PHL 90 % 50 % 10 % 0V VOH VOL Outp...
Description 8-bit Latch / Shift Register

File Size 111.21K  /  10 Page

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    HD74HCT573FPEL HD74HCT563 HD74HCT573TELL HD74HCT563RPEL HD74HCT573P HD74HCT563FPEL

Renesas Electronics Corporation
Part No. HD74HCT573FPEL HD74HCT563 HD74HCT573TELL HD74HCT563RPEL HD74HCT573P HD74HCT563FPEL
OCR Text ... Notes : 1. Input waveform : prr 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns * Waveform - 2 tr Input D 10 % 90 % 1.3 V 90 % 1.3 V 1.3 V 10 % tf VCC 0V tW tsu th VCC 1.3 V 10 % 1.3 V tW tsu tr tf 90 % 1.3 V 1.3 V th Inpu...
Description Octal Transparent Latches (with 3-state outputs)

File Size 125.57K  /  10 Page

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    HD74LS193FPEL HD74LS193 HD74LS193P HD74LS193RPEL

Renesas Electronics Corporation
Part No. HD74LS193FPEL HD74LS193 HD74LS193P HD74LS193RPEL
OCR Text ...H, tTHL 7 ns, Duty Cycle 50%, prr = 500 kHz (Data input). prr = 1 MHz (except data input) 2. for max tTLH = tTHL 2.5 ns. 3. tn is reference bit time when all outputs are low. Rev.2.00, Feb.18.2005, page 7 of 11 HD74LS193 Waveforms ...
Description Synchronous Up / Down Decade Counter (dual clock lines)

File Size 103.54K  /  12 Page

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    HD74LS374 HD74LS374RPEL HD74LS374FPEL HD74LS374P

Renesas Electronics Corporation
Part No. HD74LS374 HD74LS374RPEL HD74LS374FPEL HD74LS374P
OCR Text ... 15 ns, tTHL 6 ns Clock input; prr = 1 MHz, duty cycle 50% Data input pulse; prr = 500 kHz, duty cycle 50% 2. max: tTLH 2.5 ns, tTHL 2.5 ns Waveforms 2 tTHL Output Control 90% 1.3V tTLH 90% 1.3V 3V 0V tLZ 10% tZL 4.5V S1 closed, ...
Description Octal D-type Edge-triggered Flip-Flops (with three-state outputs)

File Size 92.42K  /  8 Page

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