2.5 V / 3.3 V 18-bit universal bus transceiver (3-State) 2.5V/3.3V 18-bit universal bus transceiver (3-State)(2.5V/3.3V 18位通用总线收发器(三态)) 2.5V/3.3V 18-bit universal bus transceiver 3-State
18-bit universal bus transceiver with 30Ω termination resistor (3-State)(30Ω终端电阻器的18位通用总线收发器(三态)) 18-bit universal bus transceiver with 30 ohm termination resistor; 3-state
Low Voltage 18-Bit universal bus Driver with 3.6V Tolerant Outputs and 26?/a> Series Resistors in Outputs Low Voltage 18-Bit universal bus Driver with 3.6V Tolerant Outputs and 26 Series Resistors in Outputs Low Voltage 36-Bit universal bus Transceivers with 3.6V Tolerant Inputs and Outputs Low Voltage 18-Bit universal bus Driver with 3.6V Tolerant Outputs and 26з Series Resistors in Outputs
SDRAM|4X4MX8|CMOS|TSOP|54PIN|PLASTIC 128M-bit Synchronous DRAM 4-bank, lvttl WTR (Wide Temperature Range) SDRAM|4X8MX4|CMOS|TSOP|54PIN|PLASTIC 128M-bit Synchronous DRAM 4-bank/ lvttl WTR (Wide Temperature Range)
2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM lvttl 200万32内存512k × 32 × 4银行同步DRAM lvttl 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM lvttl 200万32内存12k × 32 × 4银行同步DRAM lvttl 512K x 32Bit x 4 Banks Synchronous DRAM Data Sheet