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ICS
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Part No. |
ICS87158
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OCR Text |
lvcmos /1, /2, /4 CLOCK GENERATOR
FEATURES
* 6 HCSL outputs * 2 lvcmos/LVTTL outputs * 1 Differential lvpecl clock input pair * PCLK, nPCLK supports the following input types: lvds, lvpecl, LVHSTL, SSTL, HCSL * Maximum output frequency: 6... |
Description |
Low Skew 1-to-6 ÷1, 2, 4 Clock Generator. From old datasheet system
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File Size |
253.44K /
16 Page |
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ICS
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Part No. |
ICS87159
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OCR Text |
lvcmos outputs * lvpecl clock input pair * PCLK, nPCLK supports the following input types: lvds, lvpecl, LVHSTL, SSTL, HCSL * Maximum output frequency: 600MHz * Output skew: 110ps (maximum) * Propagation delay: 3.6ns (maximum) * 3.3V operat... |
Description |
Low Skew 1-to-8, ÷1, 2, 4 Clock Generator. (P) From old datasheet system
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File Size |
191.49K /
16 Page |
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ICST[Integrated Circuit Systems]
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Part No. |
ICS853016 ICS853016AMT ICS853016AG ICS853016AGT ICS853016AM
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OCR Text |
...ut. Default LOW when left open. lvcmos/LVTTL interface levels. Negative supply pin. Differential clock outputs. lvpecl interface levels. Positive supply pin.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3 4 5 6, 7 8 Name nQ D VBB/nD nEN VEE nQH... |
Description |
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-3.3V, 5V lvpecl/ECL FANOUT BUFFER From old datasheet system Low Skew, 1-to-2, Differential-to-lvpecl Fanout Buffer. Industrial Temperature.
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File Size |
215.24K /
13 Page |
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ICS
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Part No. |
ICS85301
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OCR Text |
...ut frequency: 3GHz * Translates lvcmos/LVTTL input signals to lvpecl levels by using a resistor bias network on nPCLK0, nPCLK0 * Propagation...lvds levels. The ICS85301 is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use... |
Description |
2:1 Differential-to-lvpecl Multiplexer. Industrial Temperature From old datasheet system
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File Size |
289.79K /
19 Page |
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Integrated Circuit Syst... ICST[Integrated Circuit Systems]
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Part No. |
ICS853031 ICS853031AYT ICS853031AY ICS853031AYLF ICS853031AYLFT
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OCR Text |
... any single ended input signal (lvcmos, LVTTL, GTL) to 3.3V lvpecl levels with resistor bias on nCLK or nPCLK inputs * Output skew: 20ps (ty...lvds, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulse... |
Description |
Low Skew, 1-to-9, Differential-to-lvpecl Fanout Buffer. Industrial Temperature. Improved Performance. From old datasheet system Circular Connector; No. of Contacts:1; Series:; Body Material:Aluminum Alloy; Connecting Termination:Solder; Connector Shell Size:18; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:18-16 RoHS Compliant: No ER 6C 6#16 PIN PLUG Hex inverter buffers / drivers with high-voltage outputs 14-PDIP 0 to 70 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-2.5V/3.3V lvpecl/ECL FANOUT BUFFER
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File Size |
226.49K /
19 Page |
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ICS
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Part No. |
ICS85357-01
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OCR Text |
...ace levels. Clock select input. lvcmos / LVTTL interface levels. Clock select input. lvcmos / LVTTL interface levels.
TABLE 1. PIN DESCRI...lvds, lvpecl, LVHSTL, SSTL, HCSL and other differential signals. Both VSWING and VOH must meet the V... |
Description |
4:1 or 2:1, Differential-to-3.3V lvpecl/ECL Clock Multiplexer. From old datasheet system
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File Size |
157.28K /
13 Page |
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ICS
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Part No. |
ICS85357I-01 ICS85357-01I
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OCR Text |
...ace levels. Clock select input. lvcmos / LVTTL interface levels. Clock select input. lvcmos / LVTTL interface levels.
TABLE 1. PIN DESCRI...lvds, lvpecl, LVHSTL, SSTL, HCSL and other differential signals. Both VSWING and VOH must meet the V... |
Description |
4:1 or 2:1 Differential-to-3.3V lvpecl / ECL Clock Multiplexer. Industrial Temperature. From old datasheet system
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File Size |
172.44K /
12 Page |
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it Online |
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