quad d-type flip-flop with Common Clock and Reset quad D flip-flop with Common Clock and Reset High-Performance Silicon-Gate CMOS quad D FLLP-FLOP WLTH COMMON CLOCK AND RESET From old datasheet system
Graphics System Processor 145-CPGA -55 to 125 4000/14000/40000 SERIES, POSITIVE EDGE TRIGGERED D flip-fLOP, COMPLEMENTARY OUTPUT, PDIP16 quad Type D flip-flop
High Speed CMOS Logic quad d-type flip-flops with 3-State Outputs 16-TSSOP -55 to 125 Power Management ICs High Speed CMOS Logic quad d-type flip-flops with 3-State Outputs 16-SO -55 to 125