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				Mitel Semiconductor MITEL[Mitel Networks Corporation]
Part No.	MT8979 MT8979AC MT8979AE MT8979AP
OCR Text	... and must have its falling edge aligned with the center of the received bit (RxD). Frame Pulse Input: The ST-BUS frame synchronization signal which defines the beginning of the 32 channel frame. Internal Connection: Tie to VSS (Ground) for ...
Description	ISO-CMOS ST-BUS FAMILY CEPT PCM 30/CRC-4 Framer & Interface ISO-CMOS ST-BUS⑩ FAMILY CEPT PCM 30/CRC-4 Framer & Interface
File Size	339.41K / 26 Page	View it Online	Download Datasheet

				AEROFLEX[Aeroflex Circuit Technology] Aeroflex Inc. Aeroflex, Inc.
Part No.	R4430PCF10MCM R4430SC1MF10MCM R4400 R4400PC R4400SC R4430PCP10MCM R4400MC R440. R440.PC R440.SC
OCR Text	... clock out: Master clock output aligned with MasterClock Synchronization clock out: Synchronization clock output must be connected to SyncIn through an interconnect that models the interconnect between MasterOut, TClock, RClock, and the ext...
Description	The Aeroflex RISC TurboEngine Microprocessor Multichip Module A MIPS R4400 RISC Microprocessor Multichip Module 基于MIPS R4400 RISC微处理器的多芯片模块
File Size	169.13K / 11 Page	View it Online	Download Datasheet

				INTERSIL[Intersil Corporation]
Part No.	CP82C55A CP82C55A-5 IP82C55A IP82C55A-5 CS82C55A CS82C55A-5 CD82C55A CD82C55A-5 ID82C55A ID82C55A-5 MD82C55A MD82C55A-5 MD82C55A-5B MD82C55AB 82C55 MR82C55A MR82C55A-5 MR82C55A-5B MR82C55AB IS82C55A 82C55A FN2969 IS82C55A-5 8406602QA 8406601QA 8406601XA 8406602XA
OCR Text	...nd is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually progr...
Description	From old datasheet system CMOS Programmable Peripheral Interface
File Size	232.79K / 26 Page	View it Online	Download Datasheet

				Dallas Semiconductor Dallas Semiconducotr
Part No.	DS2154 DS2154L DS2154LN
OCR Text	...l access to both Si and Sa bits aligned with CRC multiframe Four separate loopbacks for testing functions Large counters for bipolar and code violations, CRC4 codeword errors, FAS errors, and E bits Pin compatible with DS2152 T1 Enhanced Si...
Description	Enhanced E1 Single Chip Transceiver
File Size	1,101.58K / 87 Page	View it Online	Download Datasheet

				HP[Agilent(Hewlett-Packard)] Agilent (Hewlett-Packard)
Part No.	HDMP-1526
OCR Text	...ach other. The parallel data is aligned with the rising edge of alternating clocks. The transceiver provides for onchip local loop-back functionality, controlled through an external input pin. Additionally, the byte synchronization feature ...
Description	Transistor Diode Kit;Contents Of Kit:Transistor/Diode Kit Fibre Channel Transceiver Chip
File Size	217.05K / 14 Page	View it Online	Download Datasheet

				Agilent (Hewlett-Packard) HP[Agilent(Hewlett-Packard)]
Part No.	HDMP-1536 HDMP-1546
OCR Text	.... The parallel data is properly aligned with the rising edge of alternating clocks. The transceiver provides for onchip local loop-back functionality, controlled through an external input pin. Additionally, the byte synchronization feature ...
Description	Fibre Channel Transceiver Chip
File Size	246.58K / 15 Page	View it Online	Download Datasheet

				Dantona Industries, Inc. HP[Agilent(Hewlett-Packard)] Agilent (Hewlett-Packard)
Part No.	HDMP-1636 HDMP-1646
OCR Text	.... The parallel data is properly aligned with the rising edge of alternating clocks. For test purposes, the transceiver provides for on-chip local loopback functionality, controlled through an external input pin. Additionally, the byte De...
Description	Gigabit Ethernet Transceiver Chip 千兆以太网收发器芯片 Software
File Size	314.09K / 15 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9176-01 ICS9176M-01 AV9176M-01 ICS9176Q-01
OCR Text	...e divide by two circuit will be aligned with the rising edge of the 66 MHz input clock. This type of configuration can be used to eliminate propagation delay as long as the signal at FBIN is continuous and is not gated or conditional. Fi...
Description	Low Skew Output Buffer
File Size	377.43K / 8 Page	View it Online	Download Datasheet

				Motorola, Inc
Part No.	MC145402 MC145402L
OCR Text	...s and approximately rising edge aligned with MSI. MSI Master Sync Input (Pin 6) This pin determines the conversion rate for both the coder and the decoder. One A/D and D/A conversion takes place during each period of the digital clock ap...
Description	Serial 13-Bit Linear Codec(A/D and D/A)
File Size	131.39K / 16 Page	View it Online	Download Datasheet

				Motorola Mobility Holdings, Inc. Motorola, Inc. MOTOROLA[Motorola Inc]
Part No.	MC145421DW MC145421P MC145425DW MC145425P MC145425 MC145421
OCR Text	...d be approximately leading edge aligned with the TDC/RDC data clock input pin. CCI High-Speed Clock Input (Pin 17) An 8.192 MHz clock should be supplied to this input. The 8.192 MHz input should be 50% duty cycle. However, it may free-run w...
Description	Universal Digital-Loop Transceiver2(????板???矾?跺??? ISDN Universal Digital Loop Transceivers II DATACOM, ISDN CONTROLLER, PDSO24 Universal Digital-Loop Transceiver2(通用数字回路收发 DATACOM, DIGITAL SLIC, PDIP24 Universal Digital-Loop Transceiver2(通用数字回路收发
File Size	268.56K / 16 Page	View it Online	Download Datasheet

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