...stem connection through the I2C bus reports the performance status of the power supplies within the power shelf. Two Power Shelves can opera...a-48-RC
Description
Power shelf for 48V D1U
INPUT CHaRaCTERISTICS
Parameter
Input Voltage O...
bus Termination Regulator W83310DS-a/W83310DG-a
W83310DS-a/W83310DG-a
W83310DS-a/W83310DG-a Datasheet Revision History
PaGES DaTES VERSION VERSION ON WEB MaIN CONTENTS
1 2 3 4 5 6 7 8
1/17/2006
0.5
N.a.
First released
...
...ntroller. * automatic DDR2 DRaM bus Calibration. * automatic Channel Calibration. * Full Host Control of the DDR2 DRaMs. * Over-Temperature ...a
1.2
Description
DIMMs on a system board using an Industry Standard HighSpeed Differential P...
...ity bit for address and control bus.
TaBLE 1
Performance table for -3S
Product Type Speed Code Speed Grade Max. Clock Frequency @CL5 @C...a Registered DDR2 SDRaM Modules
TaBLE 2
Performance table for -3.7
Product Type Speed Code Spee...
...ity bit for address and control bus * Programmable CaS Latencies (3, 4 & 5), Burst Length (4 & 8) and Burst Type * auto Refresh (CBR) and Se...a Registered DDR2 SDRaM Modules
1.2
Description
capacitive loading to the system bus, but add...
...apacitive loading to the system bus, but adds one cycle to the SDRaM timing. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The firs...
...ity bit for address and control bus * 512 MB, 1 GB, and 2 GB module built with 512 Mbit DDR2 SDRaMs in P-TFBGa-60 chipsize packages. * Stand...a single + 1.8 V ( 0.1 V) power supply * all speed grades faster than DDR2-400 comply with DDR2-400 ...
...ntroller. * automatic DDR2 DRaM bus Calibration. * automatic Channel Calibration. * Full Host Control of the DDR2 DRaMs. * Over-Temperature ...a 240-Pin Fully-Buffered DDR2 SDRaM Modules
1.2
Description
Standard High-Speed Differential ...
...ntroller. * automatic DDR2 DRaM bus Calibration. * automatic Channel Calibration. * Full Host Control of the DDR2 DRaMs. * Over-Temperature ...a
1.2
Description
using an Industry Standard High-Speed Differential Point-toPoint Link Inter...
Description
240-Pin Fully-Buffered DDR2 SDRaM Modules DDR2 SDRaM 512M X 72 DDR DRaM MODULE, PDMa240
...apacitive loading to the system bus, but adds one cycle to the SDRaM timing. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The firs...