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![NB4N855S NB4N855SMR4 NB4N855SMR4G](Maker_logo/on_semiconductor.GIF)
ONSEMI[ON Semiconductor]
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Part No. |
NB4N855S NB4N855SMR4 NB4N855SMR4G
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OCR Text |
...PECL, CML, HSTL, lvds, or LVTTL/lvcmos) to lvds. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 1.5 Gb/s or 1.0 GHz, resp... |
Description |
3.3 V, 1.5 Gb/s Dual AnyLevelTM to lvds Receiver/Driver/Buffer/ Translator
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File Size |
130.78K /
10 Page |
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it Online |
Download Datasheet
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ICS
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Part No. |
M2026
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OCR Text |
...lvpecl, as well as single-ended lvcmos, LVTTL Loss of Lock (LOL) output pin; Narrow Bandwidth control input (NBW pin) AutoSwitch (AUTO pin...lvds. Resistor bias on inverting terminal supports TTL or lvcmos. Reference clock input selection. L... |
Description |
SAW PLL for Frequency Translation with automatic reference clock reselection, Loss of Lock indicator, and Hitless Switching options
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File Size |
333.73K /
12 Page |
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it Online |
Download Datasheet
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Price and Availability
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