19-1271; Rev 0; 8/97
12-Bit, 100Msps ECL DAC
_______________General Description
The MAX5012 is a 12-bit, 100Msps digital-to-analog conv...2MHz span V TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C TA = +25C 70 68 68 68 2 70 68 68 68 2 ...
Description
12-Bit, 100Msps ECL DAC PARALLEL, WORD INPUT LOADING, 0.013 us SETTLING TIME, 12-BIT DAC, PDIP28 12-Bit / 100Msps ECL DAC
1.0
S3C9234/P9234
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM88RCRI PRODUCT FAMILY
Samsung's SAM88RCRI family of 8-bit single-ch...2MHz 2.7 V to 5.5 V at 0.4 - 8.0MHz
Operating Temperature Range * -25 C to +85 C
Watch Timer *...
...IP, SOIC) TOP VIEW
BAL -IN +IN 1 2 3 4 8 COMP V+ OUT BAL
Ordering Information
PART NUMBER (BRAND) HA2-2520-2 HA2-2522-2 HA2-2525-5 HA3-2525-5 HA7-2520-2 HA7-2525-5 HA9P2525-5 (H25255) TEMP. RANGE (oC) -55 to 125 -55 to 125 0 to 75 0 to...
Description
20MHz, High Slew Rate, Uncompensated, High Input Impedance, Operational Amplifiers 0MHz,高压摆率,无偿,高输入阻抗,运算放大器 20MHz/ High Slew Rate/ Uncompensated/ High Input Impedance/ Operational Amplifiers From old datasheet system
...put clock amplitude VCLK 0.3 to 1.0 Vp-p (0.5Vp-p typ.) * Clock frequency fCLK 7.159090 MHz * Input clock waveform Sine wave
Blook Diagra...2MHz, b 150mVp-p, sine wave c No signal input No signal input 5-staircase wave (For luminance signa...
...put clock amplitude VCLK 0.3 to 1.0 Vp-p (0.5Vp-p typ.) * Clock frequency fCLK 8.867238 MHz * Input clock waveform Sine wave Input Signal Am...2MHz, b 150mVp-p, sine wave c No signal input No signal input 5-staircase wave (For luminance signa...
Description
CMOS-CCD 1H Delay Line for PAL CMOS与CCD延迟线上半年为PAL制式