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Integrated Device Technology, Inc.
IDT
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| Part No. |
IDT723646L15PF IDT723646L15PF8 IDT723636L12PF
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| OCR Text |
...46 is a monolithic, high-speed, low- power, cmos triple bus synchronous (clocked) fifo memory which supports clock frequencies up to 83 mhz ...flow) or is written to port c first (c-to-a data flow). a low on be will select little-endian operat... |
| Description |
CMOS TRIPLE BUS SyncFIFO WITH BUS-MATCHING 512 X 36 BI-DIRECTIONAL FIFO, 8 ns, PQFP128
1K x 36 x 2 Triple-Bus FIFO, 5.0V
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| File Size |
564.10K /
35 Page |
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Download Datasheet
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Philips
NXP Semiconductors N.V.
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| Part No. |
74ALVT16500
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| OCR Text |
...when LEAB is High. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is s...flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are co... |
| Description |
2.5 V / 3.3 V 18-bit universal bus transceiver (3-State)
2.5V/3.3V 18-bit universal bus transceiver (3-State)(2.5V/3.3V 18位通用总线收发器（三态）) 2.5V/3.3V8位通用总线收发器（3态）.5V/3.3V8位通用总线收发器（三态）
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| File Size |
107.78K /
16 Page |
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it Online |
Download Datasheet |
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Price and Availability
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