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XILINX
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| Part No. |
XCR3064XL
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| OCR Text |
CPLD
0 14
DS017 (v2.1) February 13, 2004
Product Specification
Features
* * * * * Low power 3.3V 64 macrocell CPLD 6.0 ns pin-to-pin logic delays System frequencies up to 192 MHz 64 macrocells with 1,500 usable gates Available in... |
| Description |
64 Macrocell CPLD
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| File Size |
83.91K /
9 Page |
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it Online |
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Xilinx
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| Part No. |
XCR3256XL
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| OCR Text |
...es ? lowest power 256 macrocell cpld 7.5 ns pin-to-pin logic delays system frequencies up to 140 mhz 256 macrocells with 6,400 usable gates available in small footprint packages - 144-pin tqfp (120 user i/o pins) - 208-pin pqfp (164... |
| Description |
XCR3256XL: 256 Macrocell CPLD
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| File Size |
84.80K /
11 Page |
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it Online |
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Xilinx Inc
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| Part No. |
XC95144-10PQ160I XC9572-10PC44C
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| OCR Text |
CPLD Family
0 1*
September 15, 1999 (Version 5.0)
Features
* High-performance - 5 ns pin-to-pin logic delays on all pins - fCNT to 125 MHz Large density range - 36 to 288 macrocells with 800 to 6,400 usable gates 5 V in-system progr... |
| Description |
FlashComplexPLD
COMPLEX-FLASH PLD,72-CELL,10NS PROP DELAY,LDCC,44PIN,PLASTIC
From old datasheet system
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| File Size |
114.13K /
16 Page |
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it Online |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C371I
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| OCR Text |
CPLD
Features
* * * * 32 macrocells in two logic blocks 32 I/O pins 5 dedicated inputs including 2 clock pins In-System Reprogrammable (ISRTM) Flash technology -- JTAG interface * Bus Hold capabilities on all I/Os and dedicated inputs * N... |
| Description |
UltraLogic 32-Macrocell Flash CPLD(超逻辑2 宏单元闪CPLD) UltraLogic 32宏单元CPLD的闪光（超逻辑2个宏单元闪速的CPLD
From old datasheet system
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| File Size |
189.81K /
11 Page |
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it Online |
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Cypress
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| Part No. |
CY7C371 7C371
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| OCR Text |
CPLD
Features
* * * * * * 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed -- fMAX = 143 MHz -- tPD= 8.5 ns -- tS = ... |
| Description |
UltraLogic?32-Macrocell Flash CPLD
From old datasheet system
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| File Size |
36.98K /
1 Page |
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it Online |
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ST Microelectronics
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| Part No. |
PSD4235G2
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| OCR Text |
...cells C over 3000 gates of pld: cpld and dpld C cpld with 16 output macrocells (omcs) and 24 input macrocells (imcs) C dpld C user defined internal chip select de- coding n seven l/o ports with 52 i/o pins C 52 individually configurable i/o... |
| Description |
FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERALS FOR 16-BIT MCUS (5V SUPPLY)
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| File Size |
707.21K /
89 Page |
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it Online |
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Xilinx
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| Part No. |
XCR3128XL
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| OCR Text |
...es ? lowest power 128 macrocell cpld 6.0 ns pin-to-pin logic delays system frequencies up to 145 mhz 128 macrocells with 3,200 usable gates available in small footprint packages - 144-pin tqfp (108 user i/o pins) - 144-ball cs bga (... |
| Description |
XCR3128XL: 128 Macrocell CPLD
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| File Size |
75.62K /
9 Page |
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it Online |
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XILINX INC
XILINX[Xilinx, Inc]
Xilinx, Inc.
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| Part No. |
XC9572-15P XC9572-15TQ100I XC9572-15TQ100C XC9572-15PQ100I XC9572-10PC84I XC9572-15PC44I XC9572-15PC84I 9572 XC9572-7PC44C XC9572-7PC44I XC9572-7PC84C XC9572-7PC84I XC9572-7PQ100C XC9572-7PQ100I XC9572-7TQ100C XC9572-7TQ100I XC9572-10PQ100C XC9572-10PQ100I XC9572-15PC84C XC9572-10TQ100C XC9572-15PC44C XC9572-10TQ100I XC9572-10BPQ100I XC9572-15BPQ100I XC9572-7BPQ100C XC9572-7BPQ100I XC9572 XC9572-15PQ100C XC9572-10PC44I XC9572-10PC84C XC9572-10PC44 XC9572-10PC44C XC9572-SERIES
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| OCR Text |
CPLD
1 1*
December 4, 1998 (Version 3.0)
Product Specification
Features
* * * * * 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 72 macrocells with 1,600 usable gates Up to 72 user I/O pins 5 V in-system programmable ... |
| Description |
XC9572 In-System Programmable CPLD
From old datasheet system
XC9572 In-System Programmable CPLD XC9572在系统可编程的CPLD
XC9572 In-System Programmable CPLD FLASH PLD, 7.5 ns, PQFP100
XC9572 In-System Programmable CPLD FLASH PLD, 15 ns, PQCC44
XC9572 In-System Programmable CPLD FLASH PLD, 15 ns, PQFP100
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| File Size |
58.86K /
8 Page |
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it Online |
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Price and Availability
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