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  18 36 72-mbit Datasheet PDF File

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    Cypress
Part No. CY7C1440AV33 CY7C1442AV33
OCR Text 18/512k x 72) pipelined sync sram cy7c1440av33 cy7c1442av33 cy7c1446av33 cypress semiconductor corporation ? 3901 north first street ? san...36, 2, 097,152 x 18 and 524,288 x 72 sram cells with advanced synchronous peripheral circuitry and a...
Description Memory : Sync SRAMs

File Size 389.87K  /  27 Page

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    Cypress Semiconductor, Corp.
Part No. CYD36S18V18-167BGXC CYD36S36V18-167BGXC CYD36S36V18-167BGXI CYD36S18V18-167BGXI CYD36S36V18-200BGXC CYD18S72V18-200BGXI CYD09S18V18-167BBXI CYD09S18V18-200BBXI CYD36S72V18-200BGXC
OCR Text ...72) and 256-ball fbga ( 36 and 18) packages fullflex72 family ? 36-mbit: 512 k 72 (cyd36s72v18) ? 18-mbit: 256 k 72 (cyd18s72v18) ? 9-mbit: 128 k 72 (cyd09s72v18) fullflex36 family ? 36-mbit: 1 m 36 (cyd36s36v18) ? 18-mbit: 512 k 36...
Description FullFlex(TM) Synchronous SDR Dual-Port SRAM; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V; Speed: 167 MHz 2M X 18 DUAL-PORT SRAM, 4 ns, PBGA484
FullFlex(TM) Synchronous SDR Dual Port SRAM; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V; Speed: 167 MHz 1M X 36 DUAL-PORT SRAM, 4 ns, PBGA484
FullFlex&#153; Synchronous SDR Dual Port SRAM 1M X 36 DUAL-PORT SRAM, 3.3 ns, PBGA484
FullFlex&#153; Synchronous SDR Dual Port SRAM 256K X 72 DUAL-PORT SRAM, 3.3 ns, PBGA484
FullFlex&#153; Synchronous SDR Dual Port SRAM 512K X 18 DUAL-PORT SRAM, 4 ns, PBGA256
FullFlex&#153; Synchronous SDR Dual Port SRAM 512K X 18 DUAL-PORT SRAM, 3.3 ns, PBGA256
FullFlex&#153; Synchronous SDR Dual Port SRAM 512K X 72 DUAL-PORT SRAM, 3.3 ns, PBGA484

File Size 733.69K  /  53 Page

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    Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570KV18-500BZXC CY7C1570KV18-450BZXC
OCR Text ...t density (8 m 8, 8 m 9, 4 m 18, 2 m 36) 550 mhz clock for high bandwidth 2-word burst for reducing address bus frequency double data rate (ddr) interfaces (data transferred at 1100 mhz) at 550 mhz available in 2.5 clock cycle la...
Description 72-mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165

File Size 611.30K  /  30 Page

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    HYS72D128000HR-8-A HYS72D128000GR-8-A

Infineon Technologies AG
Part No. HYS72D128000HR-8-A HYS72D128000GR-8-A
OCR Text ...rm factor: 133.35 mm (nom.) 43.18 mm (nom.) 4.00 mm (max.) (6,80 mm max. with stacked components)  jedec standard reference layout: raw c...36 9nc 55d q 33 101 nc 147 d q 37 10 reset 56 d q s4 102 nc 148 vdd 11 vss 57 d q 34 103 nc 149 dm4 ...
Description 128M X 72 DDR DRAM MODULE, 0.8 ns, DMA184 DIMM-184

File Size 213.51K  /  18 Page

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    HYB18T512400AF HYS72T256020HR-37-A HYS72T128000GR HYS72T128020GR-5-A HYS72T256220GR-5-A HYS72T128000HR-37-A HYS72T256220

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Infineon Technologies AG
Infineon Technologies A...
Part No. HYB18T512400AF HYS72T256020HR-37-A HYS72T128000GR HYS72T128020GR-5-A HYS72T256220GR-5-A HYS72T128000HR-37-A HYS72T256220HR HYS72T128020HR HYS72T64000HR-5-A HYS72T64000HR-37-A
OCR Text ... 2 x 64mb 72 2 (512mb) 64mb 8 18 14/2/10 hys72t128000gr hys72t128000hr 1024 mb 128mb x 72 1 (512mb) 128mb 4 18 14/2/11 hys72t256220gr hys72t256220hr 2048 mb 2 x 128mb 72 2 (512mb) 128mb 4 36 14/2/11 hys72t256020gr hys72t256020hr 2048 m...
Description DDR2 Registered Memory Modules 注册的DDR2内存模块
CAP .022UF 16V PPS FILM SMD

File Size 576.72K  /  33 Page

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    CY7C1566KV18 CY7C1570KV18-450BZC CY7C1570KV18-450BZXC CY7C1570KV18-450BZXI CY7C1570KV18-400BZC CY7C1570KV18-400BZXI

Cypress Semiconductor
Part No. CY7C1566KV18 CY7C1570KV18-450BZC CY7C1570KV18-450BZXC CY7C1570KV18-450BZXI CY7C1570KV18-400BZC CY7C1570KV18-400BZXI
OCR Text ...t density (8 m 8, 8 m 9, 4 m 18, 2 m 36) 550 mhz clock for high bandwidth 2-word burst for reducing address bus frequency double data rate (ddr) interfaces (data transferred at 1100 mhz) at 550 mhz available in 2.5 clock cycle la...
Description 72-mbit DDR II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)

File Size 614.30K  /  31 Page

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    Cypress Semiconductor, Corp.
Part No. CYD04S72V18-200BBI CYD04S72V18-200BBC
OCR Text ...mbit: 512k x 72 (cyd36s72v18) ? 18-mbit: 256k x 72 (cyd18s72v18) ? 9-mbit: 128k x 72 (cyd09s72v18) ? 4-mbit: 64k x 72 (cyd04s72v18) ? fullflex36 family ? 36-mbit: 1m x 36 (cyd36s36v18) ? 18-mbit: 512k x 36 (cyd18s36v18) ? 9-mbit: 256k x 36 ...
Description 64K X 72 DUAL-PORT SRAM, 3.3 ns, PBGA484 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, BGA-484

File Size 943.26K  /  48 Page

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    CYF2018V12

Cypress Semiconductor
Part No. CYF2018V12
OCR Text 18/36/72-mbit programmable multi-queue fifos cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 001-68336 rev. *c revised august 16, 2012 18/36/72-mbit programmable multi-queu...
Description 18/36/72-mbit Programmable Multi-Queue FIFOs

File Size 610.69K  /  31 Page

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    CY7C1518AV18 CY7C1520AV18

Cypress Semiconductor
Part No. CY7C1518AV18 CY7C1520AV18
OCR Text ...features 72-mbit density (4 m 18, 2 m 36) 300-mhz clock for high bandwidth two-word burst for reducing address bus frequency double data rate (ddr) interfaces (data transferred at 600 mhz) at 300 mhz two input clocks (k and k ) fo...
Description 72-mbit DDR-II SRAM Two-Word Burst Architecture

File Size 931.84K  /  29 Page

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    HYS72T128020HR-3-A

Infineon Technologies AG
Part No. HYS72T128020HR-3-A
OCR Text ...h ? all inputs and outputs sstl_18 compatible ? off-chip driver impedance adjustment (ocd) and on-die termination (odt) ? serial presence ...36 14/2/11 j 2 gb 256m 72 4 ecc 36 14/2/10 n product type 1) 1) green product dram components 1) dr...
Description 240-Pin Registered DDR2 SDRAM Modules 128M X 72 DDR DRAM MODULE, 0.45 ns, DMA240

File Size 1,558.07K  /  74 Page

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