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NC7SZ126 EFE14B MCP41010 NTE1497 AN7318A ULN2004 55C24 AT93C
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  bert Datasheet PDF File

For bert Found Datasheets File :: 366    Search Time::1.671ms    
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    INFINEON[Infineon Technologies AG]
Part No. UPF01012
OCR Text ...tegrated bit error rate tester (bert) usable for multiple atspeed diagnostic scenarios Includes the XGXS, PCS, and PMA sublayers of the OSI protocol stack Synchronization and de-skewing of XAUI lanes Performs 8B/10B (de-)coding required for...
Description 10 Gigabit/s Transceiver with XAUI Interface

File Size 157.96K  /  2 Page

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    MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
Part No. DS3141 DS3143N DS3141N DS3142 DS3143 DS3144 DS3144N
OCR Text ...ontroller, FEAC controller, and bert, as well as full support for error detection and generation, performance monitoring, and loopbacks. FEATURES One/Two/Three/Four Independent DS3/E3 Framers on a Single Die Framing an...
Description Single/Dual/Triple/Quad DS3/E3 Framers
N/A
IC FRAMER DS3/E3 3.3V 144CSBGA

File Size 1,079.04K  /  88 Page

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    MAXIM - Dallas Semiconductor
DALLAS[Dallas Semiconductor]
Part No. DS3131DK DS3131
OCR Text ...ostic loopbacks and an on-board bert remove the need for external components. FEATURES 40 Timing Independent Ports 40 Bidirectional HDLC Channels Each Port Can Operate Up to 52Mbps Up to 132Mbps Full-Duplex Throughput On-Board ...
Description Bit-SynchronouS (BoSS) HDLC Controller Demo Kit
From old datasheet system

File Size 367.14K  /  33 Page

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    Dallas
Part No. DS3131 3131
OCR Text ...ister was modified to allow the bert Port Select Bits. 9. The transmit & receive DMA throttle bits were merged (see the MC register). 10. The COFA status bits were removed. 11. Changed bert ones and zeros detector from 32 consecutive to 31 ...
Description From old datasheet system

File Size 778.97K  /  170 Page

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    MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
Part No. DS3160
OCR Text ...ut host intervention Integrated bert supports performance monitoring Supports 8-bit or 16-bit control 3.3V supply with 5V tolerant I/O; low-power CMOS Available in 100-pin LQFP package IEEE 1149.1 JTAG support FUNCTIONAL DIAGRAM LINE IN...
Description JT 6312kbps Secondary-Rate Line Interface Unit and Framer/Formatter
JT 6312 kbps Secondary-Rate Line Interface Unit and Framer/Formatter

File Size 566.47K  /  107 Page

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    N4915A-005

Agilent(Hewlett-Packard)
Part No. N4915A-005
OCR Text ...al at 6 GBit/s when used with J-bert N4903A 1) Switching time Total jitter (p-p) Figure 1: Typical switch setup with two transmitters Skew between channels Connectors 6 ns typical 20 ps typical 2 ps typical SMA, 3.5 mm female USB ...
Description Bus Switch

File Size 188.84K  /  4 Page

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    MAXIM - Dallas Semiconductor
Part No. DS3131
OCR Text ...ostic loopbacks and an on-board bert remove the need for external components. FEATURES 40 Timing Independent Ports 40 Bidirectional HDLC Channels Each Port Can Operate Up to 52Mbps Up to 132Mbps Full-Duplex Throughput On-Board Bit Error...
Description 40-Port, Unchannelized Bit-Synchronous HDLC

File Size 1,089.33K  /  174 Page

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