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Agilent (Hewlett-Packard)
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Part No. |
1672G
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OCR Text |
...eate data streams from provided macros or from various external sources and use them to stimulate a target. Since the pattern generator is internal to the logic analyzer, the target response can be measured with the logic analyzer to identi... |
Description |
1672G Standalone Logic Analyzer with 500 MHz Timing/150 MHz State 68 Channels 128K Memory
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File Size |
1,657.90K /
24 Page |
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Atmel Corp
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Part No. |
AT40K-FFT AT40K05LV AT40K20 AT40K20LV AT40K40 AT40K10 AT40K10LV AT40K40LV
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OCR Text |
... Extensive use was made of user macros to ensure high performance layouts for sub components. The device targeted for the design was the AT40K30. Utilization of the part was as follows: Logic Cells: 1114/1600 = 69.6% RAM Cells: 48/100 = 48%... |
Description |
AT40K-FFT [Updated 8/98. 8 Pages] Fast fourier transform Intellectual Property Core for AT40K FPGAs From old datasheet system 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. 20K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V) 20K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V) 40K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V) 10K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V) 10K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V) 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (3.3V) 5K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam (5V)
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File Size |
44.66K /
8 Page |
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STMicroelectronics N.V. Atmel Corp
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Part No. |
AT40K05 AT40K05LV AT40K10LV AT40K20LV AT40K40LV
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OCR Text |
...fined, automatically generated, macros in multiple designs; speed and functionality are unaffected by the macro orientation or density of the target device. This enables the fastest, most predictable and efficient FPGA design approach and m... |
Description |
AT40K05/10/20/40(LV) Summary [Updated 5/02. 4 Pages] 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. AT40K05/10/20/40(吕)摘要[更新5 / 024页] 5K - 5万门的FPGA与DSP优化的核心细胞和分布式FreeRam From old datasheet system
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File Size |
54.84K /
4 Page |
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