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AD[Analog Devices]
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| Part No. |
ADSP-21992YST ADSP-21992
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| OCR Text |
...log to Digital Converter System Three Phase 16-bit Center Based PWM Generation Unit with 12.5 ns resolution Dedicated 32-bit Encoder Interfa...INPUT REGISTERS RESULT REGISTERS I/O REGISTERS (MEMORY MAPPED) BARREL SHIFTER ALU CONTROL STATUS BUF... |
| Description |
Mixed Signal DSP Controller With CAN
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| File Size |
589.60K /
49 Page |
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it Online |
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AD[Analog Devices]
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| Part No. |
ADV7305AKST ADV7304A ADV7304AKST ADV7305A
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| OCR Text |
...puts. The ADV7304A/ADV7305A has three separate 10-bit wide input ports that accept data in high definition and/or standard definition video format. For all standards, external horizontal, vertical, and blanking signals, or EAV/SAV timing co... |
| Description |
Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV 14-Bit DACs
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| File Size |
1,418.64K /
68 Page |
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it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1338B-100AI CYPRESSSEMICONDUCTORCORP-CY7C1338B-100AC
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| OCR Text |
...l for bank selection and output three-state control. selection guide -117 -100 maximum access time (ns) 7.5 8.0 maximum operating current (m...input registers 128k x 32 memory array clk q 0 q 1 q d ce ce clr sleep control dq[23:16] bytewrite r... |
| Description |
128K X 32 CACHE SRAM, 8 ns, PQFP100
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| File Size |
371.21K /
18 Page |
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it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY28346ZC-2T
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| OCR Text |
... when pd# is asserted low. 1 = three-state all cpu outputs. this is only applicable when pd# is low. it is not applicable to cpu_stp#. 50 ...input. this signal is synchronized internally to the device powering down the cl ock synthesizer. p... |
| Description |
Clock Synthesizer with Differential CPU Outputs
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| File Size |
237.01K /
20 Page |
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it Online |
Download Datasheet |
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Price and Availability
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