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  lvpecl lvds Datasheet PDF File

For lvpecl lvds Found Datasheets File :: 2355    Search Time::1.532ms    
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    SI5351A SI5350A SI5350C SL28EB719 SL28EB731A SL28EB742 SL28EB717 SL28EB740 SL28EB742A SI51219 SI51214 SI51210 SI51211

Silicon Laboratories
Part No. SI5351A SI5350A SI5350C SL28EB719 SL28EB731A SL28EB742 SL28EB717 SL28EB740 SL28EB742A SI51219 SI51214 SI51210 SI51211
OCR Text ...d level translation, supporting lvpecl/lvds/hcsl/lvcmos clock generation up to 710 mhz with sub 1 ps rms phase jitter. any-frequency, any-output diferential/cmos clocks part number control clock input/ outputs input frequency (mhz) o...
Description Timing Selector Guide

File Size 1,864.37K  /  20 Page

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    M2080-2087 M2080 M2087 M2081 M2082 M2085 M2086 M2080-13-669.6429

INTEGRATED DEVICE TECHNOLOGY INC
ICSI[Integrated Circuit Solution Inc]
ICST[Integrated Circuit Systems]
Part No. M2080-2087 M2080 M2087 M2081 M2082 M2085 M2086 M2080-13-669.6429
OCR Text ...Hz to 20MHz or 50kHz to 80MHz) lvpecl clock output (CML and lvds options available) Pin-selectable PLL divider ratios support FEC ratios * M2080/85: OTU1 (255/238) and OTU2 (255/237) Mapping * M2081/86: OTU1 (238/255) or OTU2 (237/255) D...
Description ATM/SONET/SDH SUPPORT CIRCUIT, CQCC36
VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN

File Size 355.73K  /  14 Page

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    MAX9317-BMAX9317C

Maxim Integrated Products
Part No. MAX9317-BMAX9317C
OCR Text lvpecl Inputs and lvds Outputs General Description The MAX9317/MAX9317A/MAX9317B/MAX9317C lowskew, dual 1-to-5 differential drivers are designed for clock and data distribution. The differential input is reproduced at five lvds outputs wi...
Description Dual 1:5 Differential Clock Drivers with lvpecl Inputs and lvds Outputs

File Size 249.57K  /  10 Page

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    ALTERA
Part No. EP20K100EQ EP20K100QC EP20K100EQC240-2
OCR Text ... differential signaling (lvds), lvpecl, PCI-X, AGP, CTT, stubseries terminated logic (SSTL-3 and SSTL-2), Gunning transceiver logic plus (GTL+), and high-speed terminated logic (HSTL Class I) - Pull-up on I/O pins before and during configur...
Description Apex 20KE Device Family (1.8V, lvds
Apex 20K Device Family (2.5V)

File Size 585.74K  /  116 Page

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    ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK

LATTICE[Lattice Semiconductor]
Part No. ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK5520V-01TN100C ISPPAC-CLK5520V-01TN100I ISPPAC-CLK55XX ISPPAC-CLK5510V-01TN48C ISPPAC-CLK5510V-01TN48I
OCR Text ...VTTL, LVCMOS, HSTL, SSTL, lvds, lvpecl * Programmable precision output impedance - 40 to 70 in 5 increments * Programmable slew rate * Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V * Programmable lock detect * Multipl...
Description In-System Programmable Clock Generator with Universal Fan-Out Buffer

File Size 794.03K  /  43 Page

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    XCV405E-8BG560C XCV405E-8BG560I XCV405E-8FG560C XCV405E-8FG560I XCV405E-6BG560C XCV405E-6BG560I XCV405E-6FG560C XCV405E-

XILINX[Xilinx, Inc]
Xilinx, Inc.
Part No. XCV405E-8BG560C XCV405E-8BG560I XCV405E-8FG560C XCV405E-8FG560I XCV405E-6BG560C XCV405E-6BG560I XCV405E-6FG560C XCV405E-6FG560I XCV405E XCV812E XCV405E-7BG560C XCV405E-7BG560I XCV405E-7FG560C XCV405E-7FG560I BG560
OCR Text ...S (622 Mb/s), Blvds (Bus lvds), lvpecl - Al I/O signals can be input, output, or bi-directional * ZBT is a trademark of Integrated Device Technology, Inc. * * * * * * * * * * * lvpecl and lvds clock inputs for 300+ ...
Description    Fast, Extended Block RAM, 1.8 V FPGA Family
Extended Memory Field Programmable Gate Arrays

File Size 36.65K  /  4 Page

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    ICS
Part No. ICS843404
OCR Text lvpecl AND lvds CLOCK GENERATOR FEATURES * Three banks of outputs: 1 bank of 2 lvds outputs and 2 banks of 1 lvpecl output * Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended reference clock input * 4 independently sele...
Description Low phase noise, Fibre Channel lvpecl/lvds Clock Generator

File Size 235.12K  /  16 Page

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