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  pecl lvpecl ecl Datasheet PDF File

For pecl lvpecl ecl Found Datasheets File :: 1063    Search Time::1.234ms    
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    Maxim
Part No. MAX9424EVKIT
OCR Text ...MAX9424, a four-channel lowskew pecl/LVpecl-to-ecl/LVecl translator. The EV kit accepts differential pecl/LVpecl input signals and converts these differential ecl/LVecl signals at an operating frequency up to 3GHz. The MAX9424 EV kit is a f...
Description Evaluation Kit for the MAX9424/ MAX9425/MAX9426/MAX9427

File Size 421.76K  /  6 Page

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    MC100EP196 MC100EP196FA MC100EP196FAR2

ONSEMI[ON Semiconductor]
Part No. MC100EP196 MC100EP196FA MC100EP196FAR2
OCR Text ...le delay of a differential Necl/pecl input transition. It has similar architecture to the EP195 with the added feature of further tuneabilit...LVpecl YES N/A LVNecl N/A YES http://onsemi.com 4 FTUNE IN IN EN 512 GD* 0 1 256 GD* ...
Description 3.3V ecl Programmable Delay Chip with FTUNE

File Size 146.28K  /  20 Page

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    MC100EPT23DTG MC100EPT23DTR2G MC100EPT23 MC100EPT23D MC100EPT23DG MC100EPT23DR2 MC100EPT23DR2G MC100EPT23DT MC100EPT23DT

ONSEMI[ON Semiconductor]
Part No. MC100EPT23DTG MC100EPT23DTR2G MC100EPT23 MC100EPT23D MC100EPT23DG MC100EPT23DR2 MC100EPT23DR2G MC100EPT23DT MC100EPT23DTR2
OCR Text ....com 2 MC100EPT23 Table 4. pecl DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2) -40C Symbol ICCH ICCL VIH VIL VIHCMR IIH IIL Characteristic Power Supply Current (Outputs set to HIGH) Power Supply Current (Outputs set to LOW) Input ...
Description Dual Differential LVpecl to LVTTL Translator

File Size 65.13K  /  8 Page

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    Freescale (Motorola)
FREESCALE[Freescale Semiconductor, Inc]
Freescale Semiconductors
飞思卡尔半导体(中国)有限公司
Part No. MC100ES6039 MC100ES6039EGR2 MC100ES6039DW MC100ES6039DWR2 MC100ES6039EG
OCR Text pecl/HSTL/LVDS /2/4, /4/6 Clock Generation Chip The MC100ES6039 is a low skew /2/4, /4/6 clock generation chip designed explicitly for low ...LVpecl input signals. In addition, by using the VBB output, a sinusoidal source can be AC coupled in...
Description 3.3 V ecl/pecl/HSTL/LVDS /-2/4, /-4/5/6 Clock Generation Chip
3.3V ecl/pecl/HSTL/LVDS 2/4, 4/6 Clock Generation Chip 3.3 ecl / pecl HSTL / LVDS / 44 / 6时钟发生器芯

File Size 228.41K  /  8 Page

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    Motorola
Part No. MC100ES6221
OCR Text pecl/HSTL Clock Fanout Buffer The Motorola MC100ES6221 is a bipolar monolithic differential clock fanout buffer. Designed for most demandin...LVpecl signals and CLK1 meets both HSTL differential signal specifications. The difference between C...
Description Low Voltage 1:20 Dlfferentlal ecl/pecl HSTL Clock Fanout Buffer

File Size 111.77K  /  12 Page

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    MC100LVELT20 MC100LVELT20D MC100LVELT20DR2

ONSEMI[ON Semiconductor]
Part No. MC100LVELT20 MC100LVELT20D MC100LVELT20DR2
OCR Text ... 3.3 V TTL/CMOS to differential pecl translator. Because pecl (Positive ecl) levels are used, only +3.3 V and ground are required. The small...LVpecl 6 NC Pin Function Differential pecl Outputs LVTTL Input Positive Supply Ground No Connect ...
Description 3.3V LVTTL/LVCMOS to Differential LVpecl Translator

File Size 49.42K  /  6 Page

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    SY89322V SY89322VMITR

Micrel Semiconductor, Inc.
Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
Part No. SY89322V SY89322VMITR
OCR Text ...a dual TTL/CMOS-to-differential pecl translator capable of running from a 3.3V or 5V supply. This part can be used in either LVTTL/LVCMOS/LVpecl or TTL/CMOS/pecl systems. It requires only a single positive supply of +3.3V or +5V, no negativ...
Description LVTTL/LVCMOS-to-DIFFERENTIAL LVpecl TRANSLATOR DUAL TTL/CMOS TO pecl TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO8

File Size 41.92K  /  5 Page

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    MICREL
Part No. SY100EP15V
OCR Text pecl/ecl 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX ecl ProTM SY100EP15V ecl ProTM SY100EP15V FEATURES High-speed 1:4 pecl/ecl fanout b...LVpecl/ecl/HSTL logic levels Available in a 16-pin TSSOP package ecl ProTM DESCRIPTION The S...
Description 3.3V / 5V 2.5GHz pecl/ecl 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX

File Size 97.57K  /  9 Page

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    Maxim
Part No. MAX9320B
OCR Text pecl/ecl/LVpecl/LVecl Clock and Data Driver General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can...
Description 1:2 Differential pecl/ecl/LVpecl/ LVecl Clock and Data Driver

File Size 119.90K  /  7 Page

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