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    CY7C1150V18-333BZC CY7C1150V18-333BZI CY7C1150V18-333BZXC CY7C1150V18-333BZXI CY7C1150V18-375BZC CY7C1150V18-375BZI CY7C

Cypress Semiconductor
Part No. CY7C1150V18-333BZC CY7C1150V18-333BZI CY7C1150V18-333BZXC CY7C1150V18-333BZXI CY7C1150V18-375BZC CY7C1150V18-375BZI CY7C1150V18-375BZXC CY7C1150V18-375BZXI CY7C1146V18-333BZC CY7C1148V18-333BZC CY7C1157V18-333BZC
OCR Text ... Address Register Write Reg 256K x 36 Array Write Reg 256K x 36 Array 36 Output Logic Control CLK Gen. R/W Read Data Reg....words. Read operations are initiated by asserting R/W HIGH and LD LOW at the rising edge of the posi...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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    天津新技术产业园区管理委员会
Part No. IS61LF12836A-7.5B2I-TR
OCR Text ...er?2010 128k?x?32, ?128k?x?36, ?256k?x?18? 4?mb? synchronous? flow-through? static?ram description the issi is61(64)lf12832a, is64vf12832...words by 32 bits. the is61(64)lf/ vf12836a is organized as 131,072 words by 36 bi...
Description
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    CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1311CV18-278BZXI CY7C1315CV18-278BZXC CY7C1311CV18-278BZC
OCR Text ...ite reg write reg write reg c c 256k x 18 array 256k x 18 array 256k x 18 array 256k x 18 array 128k x 36 array clk a (16:0) gen. k k contro...words. read operations are initiated by asserting rps active at the rising edge of the positive i...
Description 2M X 8 QDR SRAM, 0.45 ns, PBGA165
512K X 36 QDR SRAM, 0.45 ns, PBGA165

File Size 439.45K  /  31 Page

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    Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1411AV18-200BZI CY7C1411AV18-250BZI CY7C1411AV18-300BZC CY7C1411AV18-167BZI CY7C1411AV18-250BZXC CY7C1411AV18-167BZC CY7C1411AV18-167BZXC CY7C1411AV18-167BZXI CY7C1411AV18-200BZXC CY7C1411AV18-200BZXI CY7C1411AV18-250BZC CY7C1411AV18-250BZXI CY7C1415AV18-167BZC CY7C1415AV18-167BZI CY7C1415AV18-167BZXC CY7C1415AV18-167BZXI CY7C1413AV18-300BZXI CY7C1413AV18-250BZXC CY7C1415AV18-300BZXC CY7C1415AV18-300BZI CY7C1413AV18-167BZI CY7C1415AV18-250BZXC CY7C1411AV18-300BZXC
OCR Text ...ic block diagram (cy7c1415av18) 256k x 36 array clk a (17:0) gen. k k control logic address register d [35:0] read add. decode read data reg...words. read operations are initiated by asserting rps active at the rising edge of the positive in...
Description 36-Mbit QDRII SRAM 4-Word Burst Architecture 2M X 18 QDR SRAM, 0.45 ns, PBGA165
36-Mbit QDRII SRAM 4-Word Burst Architecture 1M X 36 QDR SRAM, 0.45 ns, PBGA165
36-Mbit QDRII SRAM 4-Word Burst Architecture 2M X 18 QDR SRAM, 0.5 ns, PBGA165
36-Mbit QDRII SRAM 4-Word Burst Architecture 4M X 8 QDR SRAM, 0.45 ns, PBGA165

File Size 1,137.89K  /  28 Page

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    CY7C1308CV25-100BZC CY7C1308CV25-167BZC CY7C1308CV25-133BZC

Cypress Semiconductor
Part No. CY7C1308CV25-100BZC CY7C1308CV25-167BZC CY7C1308CV25-133BZC
OCR Text ... Configuration CY7C1308CV25 - 256K x 36 Logic Block Diagram (CY7C1308CV25) A(1:0) 18 A(17:0) 16 Burst Logic LD K K CLK Gen. ...words. Read operations are initiated by asserting R/W HIGH and LD LOW at the rising edge of the Posi...
Description 9-Mbit 4-Word Burst SRAM with DDR-I Architecture

File Size 363.99K  /  18 Page

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    IS61LPD51218T_D IS61LPD25636T_D IS61SPD51218T_D IS61LPD25632T_D IS61SPD25632T IS61SPD25632T_D IS61SPD25636T_D IS61SPD512

ISSI[Integrated Silicon Solution, Inc]
Integrated Silicon Solution Inc
Part No. IS61LPD51218T_D IS61LPD25636T_D IS61SPD51218T_D IS61LPD25632T_D IS61SPD25632T IS61SPD25632T_D IS61SPD25636T_D IS61SPD51218T/D IS61LPD51218T/D IS61LPD25636T/D IS61SPD25632T/D IS61SPD25636T/D IS61LPD25632T/D IS61SPD25636D-150TQ IS61SPD25636D-5B IS61SPD25636D-150B IS61SPD25636D-133TQ IS61SPD25636D-133TQI IS61SPD25636D-150TQI IS61SPD25636D-166B IS61SPD25636D-166TQ IS61SPD25636D-5TQ IS61SPD25632D-133B IS61SPD25632D-166TQ IS61SPD25632D-5B IS61SPD25632D-150B IS61SPD25632D-133TQ IS61SPD25632D-133TQI IS61SPD25632T-150TQI IS61SPD25632T-150TQ IS61SPD25632T-5TQ IS61SPD25632T-5TQI IS61SPD25632D-150TQI IS61SPD25632T-166TQ IS61SPD25632T-133TQ IS61SPD25632T-133TQI IS61SPD25636D-133B IS61SPD25632D-150TQ IS61SPD25632D-166B IS61SPD25632D-5TQ IS61SPD25632D-5TQI IS61LPD25632D-133TQI IS61LPD25632D-133TQ IS61LPD25632D-150TQ IS61LPD25632D-5TQI IS61LPD25632T-133TQ IS61LPD25632T-133TQI IS61LPD25632T-150TQ IS61LPD25632T-5TQ IS61LPD25632T-5TQI IS61LPD25636D-133TQ IS61LPD25636D-133TQI IS61LPD25636D-150TQ IS61LPD25636D-5TQ IS61LPD25636T-133TQ IS61LPD25636D-5TQI IS61LPD25636T-133TQI IS61LPD25636T-150TQ IS61LPD25636T-5TQ IS61LPD25636T-5TQI IS61LPD51218D-133B IS61LPD51218D-133TQ IS61LPD51218D-150B IS61LPD51218D-13
OCR Text 256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM FEATURES * Internal self-timed write cycle * Indivi...words by 32 bits and the IS61SPD25636 and IS61LPD25636 are organized as 262,144 words by 36 bits. Th...
Description 512K x 18 synchronous pipeline, double-cycle deselect static RAM
256K x 32 synchronous pipeline, double-cycle deselect static RAM
256K x 36 synchronous pipeline, double-cycle deselect static RAM
256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM

File Size 151.83K  /  22 Page

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    Integrated Silicon Solution Inc
Part No. IS61NLF25636
OCR Text ...ear burst sequence is selected. 256k x 32, 256k x 36 and 512k x 18 flow-through 'no wait' state bus sram preliminary information april 2001 fast access time symbol parameter -10 units t kq clock access time 10 ns t kc cycle time 12 ns frequ...
Description SRAM

File Size 157.17K  /  20 Page

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    ISSI[Integrated Silicon Solution Inc]
ISSI[Integrated Silicon Solution, Inc]
Part No. IS61NLP25636 IS61NLP25632 IS61NLP51218 IS61NP51218-5TQI IS61NP25632 IS61NP25632-133B IS61NP25632-133BI IS61NP25632-133TQ IS61NP25632-133TQI IS61NP25632-5B IS61NP25632-5BI IS61NP25632-5TQ IS61NP25632-5TQI IS61NP25636 IS61NP25636-133B IS61NP25636-133BI IS61NP25636-133TQ IS61NP25636-133TQI IS61NP25636-5B IS61NP25636-5TQ IS61NP25636-5TQI IS61NP51218 IS61NP51218-133B IS61NP51218-133BI IS61NP51218-133TQ IS61NP51218-133TQI IS61NP51218-5B IS61NP51218-5BI IS61NP51218-5TQ IS61NP25636-5BI IS61NLP51218-133B IS61NLP51218-133TQ IS61NLP51218-133TQI IS61NLP51218-5B IS61NLP51218-5BI IS61NLP51218-5TQ IS61NLP51218-5TQI IS61NLP25632-5BI IS61NLP25632-133TQ
OCR Text 256K x 32, 256K x 36 and 512K x 18 PIPELINE 'NO WAIT' STATE BUS SRAM ISSI (R) PRELIMINARY INFORMATION APRIL 2001 FEATURES * * *...words by 32 bits, 262,144 words by 36 bits and 524,288 words by 18 bits, fabricated with ISSI's adva...
Description 256K x 32 pipeline no wait state bus sram
256K x 32/ 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM
256K x 32 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM

File Size 154.59K  /  20 Page

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    CY7C1150V18 CY7C1146V18-333BZXC CY7C1146V18-375BZXC CY7C1148V18-333BZXC CY7C1148V18-375BZXC CY7C1157V18-333BZXC CY7C1157

Cypress Semiconductor
Part No. CY7C1150V18 CY7C1146V18-333BZXC CY7C1146V18-375BZXC CY7C1148V18-333BZXC CY7C1148V18-375BZXC CY7C1157V18-333BZXC CY7C1157V18-375BZXC CY7C1146V18-375BZC CY7C1148V18-375BZC CY7C1157V18-375BZC
OCR Text ... Address Register Write Reg 256K x 36 Array Write Reg 256K x 36 Array 36 Output Logic Control CLK Gen. R/W Read Data Reg....words. Read operations are initiated by asserting R/W HIGH and LD LOW at the rising edge of the posi...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 973.49K  /  27 Page

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