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GSI Technology, Inc.
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| Part No. |
GS841E18AT-166 GS841E18AT-133I
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| OCR Text |
...dv ), and write control inputs (bw1 , bw2 , bwe , gw, de ) are synchronous and are controlled by a positive-edge-triggered clock (clk). ...7.5 ns 4.0 ns 250 ma 10 ns 4.5 ns 190 ma flow through 2-1-1-1 t kq t cycle i dd 8 ns 9.1 ns 210 ma ... |
| Description |
256K x 18 Sync Cache Tag 256K X 18 CACHE TAG SRAM, 8.5 ns, PQFP100
256K x 18 Sync Cache Tag 256K X 18 CACHE TAG SRAM, 11 ns, PQFP100
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| File Size |
413.78K /
21 Page |
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ELNA CO., Ltd.
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| Part No. |
EDI2AG27265V10D1
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| OCR Text |
... controlled byte write enables (bw1\ - bw8\) ? clock controlled registered address ? clock controlled registered global write (gw\) ? aysnch...7, 10, 11 a0-a17 input addresses: these inputs are registered and must meet the setup and hold 14,... |
| Description |
2x64Kx72, 3.3V,10ns, Sync/Sync Burst SRAM Module(2x64Kx72, 3.3V0ns,同步/同步脉冲静态RAM模块) 2x64Kx72.3伏，10纳秒，同同步突发静态存储器模块x64Kx72.3伏，10纳秒，同同步脉冲静态内存模块）
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| File Size |
2,756.97K /
11 Page |
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IDT
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| Part No. |
IDT71V35761 IDT71V35781
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| OCR Text |
...y
A0-A17 CE CS0, CS1 OE GW BWE BW1, BW2, BW3, BW4(1) CLK ADV ADSC ADSP LBO ZZ I/O0-I/O31, I/OP1-I/OP4 VDD, VDDQ VSS Address Inputs Chip Ena...7, I/OP1, BW2 controls I/O8-15, I/OP2, etc. Any active byte write causes all outputs to be disabled.... |
| Description |
128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
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| File Size |
513.67K /
23 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT71V3576 IDT71V3578
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| OCR Text |
...y
A0-A17 CE CS0, CS1 OE GW BWE BW1, BW2, BW3, BW4(1) CLK ADV ADSC ADSP LBO ZZ I/O0-I/O31, I/OP1-I/OP4 VDD, VDDQ VSS Address Inputs Chip Ena...7, I/OP1, BW2 controls I/O8-15, I/OP2, etc. Any active byte write causes all outputs to be disabled.... |
| Description |
128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect
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| File Size |
511.74K /
23 Page |
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it Online |
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ICSI
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| Part No. |
IS61LV6464
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| OCR Text |
...individual bytes to be written. BW1 controls I/O1-I/O8, BW2 controls I/O9-I/O16, BW3 controls I/O17-I/O24, BW4 controls I/O25-I/O32, BW5 con...7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
102 ... |
| Description |
SYNCHRONOUS STATIC RAM, Pipelined Synchronous SRAM
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| File Size |
483.91K /
18 Page |
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IDT
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| Part No. |
IDT71V2548SA IDT71V2548S IDT71V2546SA IDT71V2546S
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| OCR Text |
... linear) Individual byte write (BW1 - BW4) control (May tie active) Three chip enables for simple depth expansion 3.3V power supply (5%), 2....7 1.7 -0.3(1) Typ. 3.3 2.5 0
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Max. 3.465 2.625 0 VDD +0.3 VDDQ +0.3 0.7
(2)
Un... |
| Description |
128K x 36, 256K x 18 3.3V Synchronous ZBT? SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
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| File Size |
509.61K /
28 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT71V25761 IDT71V25781
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| OCR Text |
...y
A0-A17 CE CS0, CS1 OE GW BWE BW1, BW2, BW3, BW4 CLK ADV ADSC ADSP LBO ZZ I/O0-I/O31, I/OP1-I/OP4 VDD, VDDQ VSS
(1)
Address Inputs Chi...7, I/OP1, BW2 controls I/O8-15, I/OP2, etc. Any active byte write causes all outputs to be disabled.... |
| Description |
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O,Pipelined Outputs,Burst Counter, Single Cycle Deselect
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| File Size |
511.24K /
23 Page |
View
it Online |
Download Datasheet |
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