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Integrated Silicon Solution, Inc.
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| Part No. |
IS24C01B-2ZLI IS24C02B-2PLI
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| OCR Text |
...mple bus consists of the serial clock wire (scl) and the serial data wire (sda). using the bus, a master device such as a microcontroller ...receiving devices as receivers. the bus is controlled by master device that generates the scl, co... |
| Description |
1K-bit/2K-bit 2-WIRE SERIAL CMOS EEPROM 128 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
1K-bit/2K-bit 2-WIRE SERIAL CMOS EEPROM 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8
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| File Size |
315.31K /
20 Page |
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it Online |
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天津新技术产业园区管理委员会
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| Part No. |
IS24C02A-3ZLA3
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| OCR Text |
...mple bus consists of the serial clock wire (scl) and the serial data wire (sda). using the bus, a master device such as a microcontroller ...receiving devices as receivers. the bus is controlled by master device that generates the scl, co... |
| Description |
1K-bit/2K-bit/4K-bit/8K-bit/16K-bit 2-WIRE SERIAL CMOS EEPROM 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
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| File Size |
330.36K /
22 Page |
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it Online |
Download Datasheet |
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INTERSIL[Intersil Corporation]
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| Part No. |
X4C105 X4C105V20I
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| OCR Text |
...Ground Serial Data Power Serial clock Write Protect Device Select Inputs External AUTOSTORE Capacitor NOVRAM I/Os Low Voltage Detect Output ...receiving only 1 full address. The serial interface includes a current address read that requires no... |
| Description |
CPU Supervisor with NOVRAM and Output Ports
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| File Size |
285.00K /
19 Page |
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it Online |
Download Datasheet |
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HYNIX SEMICONDUCTOR INC
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| Part No. |
HYNIXSEMICONDUCTORINC-HYMR11848-750-LP HYMR11648-750-LP
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| OCR Text |
...face. 72 pins. lcfm b10 i rsl clock from master. interface clock used for receiving rsl signals from the channel. positive polarity. lcfmn b12 i rsl clock from master. interface clock used for receiving rsl signals from the channel. neg... |
| Description |
48M X 16 RAMBUS MODULE, DMA84
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| File Size |
112.98K /
10 Page |
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it Online |
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TEMIC[TEMIC Semiconductors]
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| Part No. |
U3760MB-MFNG3 U3760MB-MSD U3760MB U3760MB-MFN
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| OCR Text |
...
100 n
100 n
XT
XT
clock generator
C1
Block Diagram / Applications
C2
C3
K e y b o a r d RAM l o g i c
Read -...receiving amplification is regulated by an AGC. Output of the receive amplifier. Dynamic transducers... |
| Description |
Low-Voltage Standard Telephone Circuit
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| File Size |
315.97K /
19 Page |
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it Online |
Download Datasheet |
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Price and Availability
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