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  differential-to-lvcmos lvttl Datasheet PDF File

For differential-to-lvcmos lvttl Found Datasheets File :: 1766    Search Time::1.718ms    
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    ICS8442 ICS8442AY ICS8442AYLF ICS8442AYLFT ICS8442AYT

Integrated Circuit Syst...
Integrated Circuit Solution Inc
ICST[Integrated Circuit Systems]
Part No. ICS8442 ICS8442AY ICS8442AYLF ICS8442AYLFT ICS8442AYT
OCR Text DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER FEATURES * Dual differential LVDS outputs * Selectable crystal oscillator interface or LVCMOS/lvttl TEST_CLK * Output frequency range: 31.25MHz to 700MHz * Crystal input frequency range: 10MHz to 25...
Description 700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER
Hex schmitt-trigger inverters 14-SOIC 0 to 70

File Size 272.09K  /  15 Page

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    ICS87004 ICS87004AG ICS87004AGT

ICST[Integrated Circuit Systems]
Part No. ICS87004 ICS87004AG ICS87004AGT
OCR Text differential-to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR FEATURES * 4 LVCMOS/lvttl outputs, 7 typical output impedance * Selectable CLK0, nCLK0 or CLK1, nCLK1 clock inputs * CLKx, nCLKx pairs can accept the following differential input lev...
Description 1:4, differential-to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR
1:4 differential-to-lvcmos/lvttl ZERO DELAY CLOCK GENERATOR

File Size 174.09K  /  14 Page

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    XILINX
Part No. XC3S1500-4 XC3S200
OCR Text ...le-ended signal standards - Six differential signal standards including LVDS - Termination by Digitally Controlled Impedance - Signal swing ranging from 1.14V to 3.45V - Double Data Rate (DDR) support Logic resources - Abundant, flexible lo...
Description Spartan-3 Field Programmable Gate Array

File Size 1,420.09K  /  159 Page

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    CY2DL814 CY2DL814SCT CY2DL814ZCT CY2DL814ZI CY2DL814ZIT CY2DL814SC CY2DL814SI CY2DL814SIT CY2DL814ZC

CYPRESS[Cypress Semiconductor]
CYPRESS SEMICONDUCTOR CORP
Part No. CY2DL814 CY2DL814SCT CY2DL814ZCT CY2DL814ZI CY2DL814ZIT CY2DL814SC CY2DL814SI CY2DL814SIT CY2DL814ZC
OCR Text ... LVDS, LVPECL, or lvttl -- Four differential pairs of LVDS outputs Drives 50- or 100-ohm load (selectable) Low input capacitance Low output ...to LVDS and/or for the distribution of LVDS-based clock signals. The Cypress CY2DL814 has configurab...
Description Low-voltage operation
1:4 Clock Fanout Buffer

File Size 110.23K  /  8 Page

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    NB4N855S NB4N855SMR4 NB4N855SMR4G

ONSEMI[ON Semiconductor]
Part No. NB4N855S NB4N855SMR4 NB4N855SMR4G
OCR Text ...eature is ideal for translating differential or single-ended data or clock signals to 350 mV typical LVDS output levels. The device is offered in a small 10 lead MSOP package. NB4N855S is targeted for data, wireless and telecom applications...
Description 3.3 V, 1.5 Gb/s Dual AnyLevelTM to LVDS Receiver/Driver/Buffer/ Translator

File Size 130.78K  /  10 Page

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    EP1C6 EP1C6Q400 EP1C6Q400C6ES EP1C6Q400C7ES EP1C6Q400C8ES EP1C12 EP1C12F400 EP1C12F400C6ES EP1C12F400C7ES EP1C4F400 EP1C

Altera Corporation
Part No. EP1C6 EP1C6Q400 EP1C6Q400C6ES EP1C6Q400C7ES EP1C6Q400C8ES EP1C12 EP1C12F400 EP1C12F400C6ES EP1C12F400C7ES EP1C4F400 EP1C3T400 EP1C3T400C6ES EP1C3T400C7ES EP1C3T400C8ES EP1C20F400I7ES
OCR Text ...upport various single-ended and differential I/O standards, such as the 66-MHz, 32-bit PCI standard and the LVDS I/O standard at up to 311 Mbps. Each IOE contains a bidirectional I/O buffer and three registers for registering input, output,...
Description Cyclone FPGA Family

File Size 538.10K  /  93 Page

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    ISB35000 ISB35083 ISB35130 ISB35166

STMicroelectronics
Part No. ISB35000 ISB35083 ISB35130 ISB35166
OCR Text ...d TTL to 200 mHz plus low swing differential circuits. Standards like GTL, SCSI-2, 3.3 Volt PCI, CTI, and a limited set of 5.0 Volt interfac...TO 20% FOR R.L.) - SIMPLIFIED ROUTING AND DESIGN RULE CHECKING ISB35_VA 2/15 ISB35000 SERIE...
Description HCMOS STRUCTURED ARRAY

File Size 276.47K  /  15 Page

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