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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
5V19EE404NLGI
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OCR Text |
...orking applications. there are four internal plls, each individually programmable, allowing for four unique non-integer-related frequenc...phase relationship, short pulses can be generated during switchover. the automatic switchover mode... |
Description |
5V SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC24
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File Size |
262.71K /
29 Page |
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LSI[LSI Computer Systems]
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Part No. |
LS7366R
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OCR Text |
... a 4-wire SPI/MICROWIRE bus.The four standard bus I/Os are SS/, SCK, MISO and MOSI. The data transfer between a microcontroller and a slave ...phase signals. A and B inputs are validated by on-chip digital filters and then decoded for up/down ... |
Description |
32-BIT QUADRATURE COUNTER WITH SERIAL INTERFACE
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File Size |
83.83K /
13 Page |
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it Online |
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Motorola
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Part No. |
MC12439
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OCR Text |
...terfaces and can provide one of four division ratios (1, 2, 4, or 8). This divider extends performance of the part while providing a 50% dut...PHASE DETECTOR VCO
POWER DOWN +3.3 or 5.0V VCC0 DIV N (1, 2, 4, 8) 25 24 23 FOUT FOUT
4 16.66M... |
Description |
High Frequency Clock Synthesizer
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File Size |
114.61K /
12 Page |
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it Online |
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Applied Micro Circuits Corp.
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Part No. |
S2004
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OCR Text |
... line encoding and decoding for four separate parallel 8-bit channels ? 32-bit parallel ttl interface with internal series terminated output...phase relationship. adjustment of internal tim- ing of the s2004 is performed during reset. once syn... |
Description |
Quad Serial Backplane Device(用于高速串行数据传送的四串行收发器)
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File Size |
386.12K /
38 Page |
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it Online |
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Zarlink
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Part No. |
MT9041B
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OCR Text |
...he 16.384MHz signal to generate four clock outputs and three frame pulse
4 Tapped Delay Line 16MHz
outputs. The C8o, C4o and C2o clocks ...phase locked to the reference. The reference frequencies are selected by the frequency control pins ... |
Description |
T1/E1 System Synchronizer
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File Size |
512.83K /
21 Page |
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it Online |
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Applied Micro Circuits Corp.
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Part No. |
S2064
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OCR Text |
... line encoding and decoding for four separate parallel 8-bit channels ? 32-bit parallel ttl interface ? low-jitter serial pecl interface ? l...phase relationship. adjustment of in- ternal timing of the s2064 is performed during reset. once syn... |
Description |
Quad Serial Backplane Device(用于以太网,光纤通道高速串行数据传送的四收发器)
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File Size |
347.69K /
33 Page |
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it Online |
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Applied Micro Circuits Corp.
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Part No. |
S2065
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OCR Text |
... line encoding and decoding for four separate parallel 8 bit channels ? 32 bit parallel ttl interface ? low-jitter serial pecl interface ? l...phase relationship. adjustment of internal timing of the s2065 is per- formed during reset. once syn... |
Description |
Quad Serial Backplane Device with Dual I/O(带双传送接收串行I/O的四收发
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File Size |
389.30K /
37 Page |
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it Online |
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Price and Availability
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