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Integrated Device Techn...
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| Part No. |
ICS854110I
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| OCR Text |
...fail-safe differential inputs ? lvcmos interface levels for all control inputs ? output skew: 260ps (maximum), for fastest slew rate setting...lvttl interface levels. 3 clk0 input non-inverting clock/data input 0. 4 nclk0 input inverting diffe... |
| Description |
2.5V Differential LVDS Clock Buffer
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| File Size |
761.61K /
21 Page |
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Integrated Device Techn...
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| Part No. |
ICS854104I
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| OCR Text |
...r q0, nq0 outputs. see table 3. lvcmos/lvttl interface levels. 2 oe1 input pullup output enable pin for q1, nq1 outputs. see table 3. lvcmos/lvttl interface levels. 3 oe2 input pullup output enable pin for q2, nq2 outputs. see table 3. lvcm... |
| Description |
Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer
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| File Size |
284.54K /
15 Page |
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it Online |
Download Datasheet |
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MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
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| Part No. |
MAX9209 MAX9213 MAX9215 MAX9211
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| OCR Text |
lvcmos parallel input data to three lvds outputs. a parallel rate clock on a fourth lvds output provides timing for deserialization. the max...lvttl/lvcmos data inputs pll requires no external components up to 1.785gbps throughput lvds outp... |
| Description |
Programmable DC-Balanced 21-Bit Serializers
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| File Size |
418.55K /
20 Page |
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it Online |
Download Datasheet |
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Price and Availability
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