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ALTERA
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| Part No. |
EP20K100EQ EP20K100QC EP20K100EQC240-2
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| OCR Text |
...nce (tCO + tSU) up to 250 MHz - lvds performance up to 840 Mbits per channel - Direct connection from I/O pins to local interconnect providi...lvcmos LVTTL True-lvds and LVPECL data pins (in EP20K300E and larger devices) lvds and LVPECL clock ... |
| Description |
Apex 20KE Device Family (1.8V, lvds
Apex 20K Device Family (2.5V)
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| File Size |
585.74K /
116 Page |
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ICS
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| Part No. |
ICS843404
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| OCR Text |
lvds CLOCK GENERATOR
FEATURES
* Three banks of outputs: 1 bank of 2 lvds outputs and 2 banks of 1 LVPECL output * Selectable crystal oscillator interface or lvcmos/LVTTL single-ended reference clock input * 4 independently selectable outp... |
| Description |
Low phase noise, Fibre Channel LVPECL/lvds Clock Generator
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| File Size |
235.12K /
16 Page |
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it Online |
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ICS
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| Part No. |
ICS9DB206
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| OCR Text |
... following input types: LVPECL, lvds, LVHSTL, SSTL, HCSL * Maximum output frequency: 140MHz * Output skew: 110ps (maximum) * Cycle-to-Cycle ...lvcmos/LVTTL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3 4 5, 6 7, 13, 16, 22 8, 21... |
| Description |
High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?
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| File Size |
237.04K /
13 Page |
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it Online |
Download Datasheet |
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MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
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| Part No. |
MAX9122 MAX9121 MAX9122EUE MAX9121ESE MAX9121EUE MAX9122ESE
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| OCR Text |
lvds Line Receivers with Integrated Termination and Flow-Through Pinout
General Description
The MAX9121/MAX9122 quad low-voltage different...lvcmos outputs. The MAX9122 features integrated parallel termination resistors (nominally 107), whic... |
| Description |
Quad lvds Line Receivers with Integrated Termination and Flow-Through Pinout
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| File Size |
228.78K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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