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Intersil
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| Part No. |
ISL6532
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| OCR Text |
ddr Memory Systems
The ISL6532 provides a complete ACPI compliant power solution for up to 4 DIMM dual channel ddr/ddr2 memory systems. Included are both a synchronous buck controller and integrated LDO to supply VDDQ with high current dur... |
| Description |
ACPI Regulator/Controller for dual Channel ddr Memory Systems
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| File Size |
350.66K /
14 Page |
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Integrated Device Technology, Inc.
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| Part No. |
IDT72T54262
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| OCR Text |
ddr/sdr fifo x10 quad fifo or x10/x20 dual fifo configurations 32,768 x 10 x 4/16,384 x 20 x 2 65,536 x 10 x 4/32,768 x 20 x 2 131,072 x 10 x 4/65,536 x 20 x 2 ? 2005 integrated device technology, inc. all rights reserved. product specific... |
| Description |
2.5V QUAD/dual TeraSyncddr/SDR FIFO x10 QUAD FIFO or x10/x20 dual FIFO CONFIGURATIONS 2.5V的四/双TeraSync⑩复特别提款权先进先出10的四双FIFO或x10/x20先进先出配置
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| File Size |
549.71K /
56 Page |
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Broadcom, Corp.
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| Part No. |
BCM7328
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| OCR Text |
...mmary of benefits bcm7328 flash ddr bcm3440 si tuner cvbs, y/c rgb rf 3/4 audio l/r ir tx uhf/ir rx fp/keypad mafe/ modem bcm3440 si tuner
...dual decode/ dual tv set-top box system on a chip. the bcm7328 integrates broadcom?s field-proven ... |
| Description |
SINGLE-CHIP SATELLITE SET-TOP BOX DECODER 单芯片卫星机顶盒解码
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| File Size |
84.82K /
2 Page |
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NXP Semiconductors N.V.
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| Part No. |
ADC1412D105HN ADC1412D125HN ADC1412D125HN/C1
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| OCR Text |
...lling (lvds) doub le data rate (ddr) output standard. an integrated serial peripheral interface (spi) allows the user to easily configure...dual 14-bit adc; 65 msps, 80 ms ps, 105 msps or 125 msps; cmos or lvds ddr digital outputs rev. 4 ?... |
| Description |
dual 14-bit ADC 105 Msps CMOS or LVDS ddr digital outputs ADC1412D105HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1412D105HN/C1<SOT804-3|<<<1<Always Pb-free,;
dual 14-bit ADC 125 Msps CMOS or LVDS ddr digital outputs ADC1412D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1412D125HN/C1<SOT804-3|<<<1<Always Pb-free,;
2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
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| File Size |
522.19K /
43 Page |
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IDT
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| Part No. |
IDT72T54242
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| OCR Text |
ddr/SDR FIFO x10 QUAD FIFO or x10/x20 dual FIFO CONFIGURATIONS 32,768 x 10 x 4/32,768 x 10 x 2 65,536 x 10 x 4/65,536 x 10 x 2 131,072 x 10 x 4/131,072 x 10 x 2
PRELIMINARY IDT72T54242 IDT72T54252 IDT72T54262
FEATURES
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* * * * * ... |
| Description |
2.5V QUAD/dual TeraSync? ddr/SDR FIFO
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| File Size |
485.94K /
54 Page |
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it Online |
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Integrated Device Technology
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| Part No. |
DAC1627D1G25
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| OCR Text |
...aling (lvds) double data rate (ddr) receiver interf ace, with an on-chip 100 ? termination. the lvds ddr interface accepts a multiplex in...dual 16-bit dac, lvds interface, up to 1.25 gsps, x2, x4 and x8 interpolating rev. 03 ? 2 july 201... |
| Description |
dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and x8 interpolating
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| File Size |
1,555.03K /
81 Page |
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ON Semi
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| Part No. |
NCP5210
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| OCR Text |
ddr Power Controller
The NCP5210, 3-In-1 PWM dual Buck and Linear ddr Power Controller, is a complete power solution for MCH and ddr memory. This IC combines the efficiency of PWM controllers for the VDDQ supply and the MCH core supply vol... |
| Description |
3-In-1 PWM dual Buck and Linear ddr Power Controller
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| File Size |
77.84K /
12 Page |
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it Online |
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Price and Availability
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