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ADVANCED MICRO DEVICES INC
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Part No. |
AM29035-16FCW AM29035-16FC/W
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OCR Text |
...dress space with demand paging streamlined system interface for simplified, high-frequency operation burst-mode and page-mode access support 8-, 16-, or 32-bit rom interface 64-entry memory management unit on-chip fully pipelined on-chip t... |
Description |
32-BIT, 16 MHz, RISC PROCESSOR, CQFP144
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File Size |
203.40K /
19 Page |
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ADVANCED MICRO DEVICES INC
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Part No. |
AM29000-16/BZC
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OCR Text |
streamlined instruction microprocessors final ? distinctive characteristics full 32-bit, three-bus architecture efficient execution of high-level language programs cmos technology/ttl compatible concurrent instruction and data accesses b... |
Description |
32-BIT, 16 MHz, RISC PROCESSOR, CPGA169
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File Size |
336.52K /
31 Page |
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XILINX INC Xilinx, Inc. XINLINX XILINX[Xilinx, Inc]
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Part No. |
XC2S100E XC2S100E-6FG456C XC2S100E-6FG456I XC2S100E-6FT256C XC2S100E-6FT256I XC2S100E-6PQ208C XC2S100E-6PQ208I XC2S100E-6TQ144C XC2S100E-6TQ144I XC2S100E-7FG456C XC2S100E-7FG456I XC2S100E-7FT256C XC2S100E-7FT256I XC2S100E-7PQ208C XC2S100E-7PQ208I XC2S100E-7TQ144C XC2S100E-7TQ144I XC2S150E XC2S150E-6FG456C XC2S150E-6FG456I XC2S150E-6FT256C XC2S150E-6FT256I XC2S150E-6PQ208C XC2S150E-6PQ208I XC2S150E-6TQ144C XC2S150E-6TQ144I XC2S150E-7FG456C XC2S150E-7FG456I XC2S150E-7FT256C XC2S150E-7FT256I XC2S150E-7PQ208C XC2S150E-7PQ208I XC2S150E-7TQ144C XC2S150E-7TQ144I XC2S50E XC2S50E-6FG456C XC2S50E-6FG456I XC2S50E-6FT256C XC2S50E-6FT256I XC2S50E-6PQ208C XC2S50E-6PQ208I XC2S50E-6TQ144C XC2S50E-6TQ144I XC2S50E-7FG456C XC2S50E-7FG456I XC2S50E-7FT256C XC2S50E-7FT256I XC2S50E-7PQ208C XC2S50E-7PQ208I XC2S50E-7TQ144C XC2S50E-7TQ144I XC2S200E XC2S200E-6FG456C XC2S200E-6FG456I XC2S200E-6FT256C XC2S200E-6FT256I XC2S200E-6PQ208C XC2S200E-6PQ208I XC2S200E-6TQ144C XC2S200E-6TQ144I XC2S200E-7FG456C XC2S200E-7FG456I XC2S200E-7FT256C XC2S200E-7FT256I XC2S200E-7PQ208C XC2S200E-7PQ208I XC2S200E-7TQ144C XC2S200E-7TQ144I XC2S300E XC2S300E-6FG456C XC2S300E-6FG456I XC2S300E-6FT256C XC2S300E-6FT256I XC2S300E-6PQ208C
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OCR Text |
...anced process technology with a streamlined architecture based on the proven VirtexTM-E platform. Features include block RAM (to 64K bits), distributed RAM (to 98,304 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loops). F... |
Description |
Second generation ASIC replacement technology CLAMP FPGA, 600 CLBS, 37000 GATES, 357 MHz, PBGA456 CLAMP FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456 Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 400 MHz, PQFP208 Spartan-IIE 1.8V FPGA Family FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP144 Spartan-IIE 1.8V FPGA Family FPGA, 864 CLBS, 52000 GATES, 357 MHz, PQFP208 Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP144 Spartan-IIE 1.8V FPGA Family FPGA, 864 CLBS, 52000 GATES, 357 MHz, PBGA456 Spartan-IIE 1.8V FPGA Family 的Spartan - IIE 1.8V的FPGA系列 Spartan-IIE 1.8V FPGA Family FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PBGA256 Spartan-IIE 1.8V FPGA Family Spartan - IIE 1.8V的FPGA系列 Spartan-IIE 1.8V FPGA Family: Introduction and Ordering Information
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File Size |
78.50K /
4 Page |
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LATTICE SEMICONDUCTOR CORP
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Part No. |
ORT4622-8BM680I
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OCR Text |
... g /descramblin g of data and streamlined sonet framin g , pointer movin g and transport overhead handlin g , plus the pro g rammable lo g ic to terminate the network into proprietar y s y s- tems. embedded core features n implemented... |
Description |
FPGA, PBGA680
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File Size |
786.41K /
80 Page |
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Xilinx, Inc.
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Part No. |
XC2S50E-6PQG208C XC2S300E-6PQG208I
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OCR Text |
...ced pro- cess technology with a streamlined architecture based on the proven virtex?-e platform. features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked loops)... |
Description |
50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP208 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP208
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File Size |
810.82K /
103 Page |
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Xilinx
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Part No. |
XC2S15-XXXX
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OCR Text |
...ced pro- cess technology with a streamlined virtex-based architec- ture. features include block ram (to 56k bits), distributed ram (to 75,264 bits), 16 selectable i/o standards, and four dlls. fast, predictable interconnect means that succe... |
Description |
Spartan-II 2.5V FPGA Family:Introduction and Ordering Information
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File Size |
67.80K /
4 Page |
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Xilinx, Inc.
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Part No. |
XC2S15 XC2S50 XC2S30 XC2S150 XC2S100 XC2S200
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OCR Text |
...ced pro- cess technology with a streamlined virtex-based architec- ture. features include block ram (to 56k bits), distributed ram (to 75,264 bits), 16 selectable i/o standards, and four dlls. fast, predictable interconnect means that succe... |
Description |
Spartan-II 2.5V FPGA(Spartan-II 2.5V现场可编程门阵列)
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File Size |
43.41K /
4 Page |
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Xilinx
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Part No. |
XC2S200E
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OCR Text |
...ced pro- cess technology with a streamlined architecture based on the proven virtex?-e platform. features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked loops)... |
Description |
(XC2SxxxE) Spartan IIE 1.8V FPGA Family
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File Size |
836.47K /
103 Page |
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it Online |
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Lineage Power
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Part No. |
ORT4622
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OCR Text |
...bling/descrambling of data and streamlined sonet framing, pointer moving, and transport overhead handling, plus the programmable logic to terminate the network into proprietary sys- tems. for non-sonet applications, all sonet func- tiona... |
Description |
Field-Programmable System Chip (FPSC) Four Channel x 622 Mbits/s Backplane Transceiver(现场可编程系统芯片(四通道x 622 M秒背板收发器
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File Size |
124.48K /
6 Page |
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it Online |
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Price and Availability
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