vishay siliconix SIE816DF new product document number: 68641 s09-1337-rev. b, 13-jul-09 www.vishay.com 1 n-channel 60-v (d-s) mosfet features ? halogen-free accordin g to iec 61249-2-21 definition ? trenchfet ? power mosfet ? ultra low thermal resistance using top- exposed polarpak ? package for double- sided cooling ? leadframe-based new encapsulated package - die not exposed - same layout regardless of die size ? low q gd /q gs ratio helps prevent shoot-through ? 100 % r g and uis tested ? compliant to rohs directive 2002/95/ec applications ? primary side switch ? half-bridge product summary v ds (v) r ds(on) ( ) i d (a) q g (typ.) silicon limit package limit 60 0.0074 at v gs = 10 v 95 60 51 nc package drawing www.vishay.com/doc?72945 orderin g information: sie 8 16df-t1-e3 (lead (p b )-free) sie 8 16df-t1-ge3 (lead (p b )-free and halogen-free) to p v ie w bottom v ie w top s u rface is connected to pins 1, 5, 6, and 10 polarpak 10 d s s g d d s s g d 1 432 5 67 8 9 d dsg d 5 4 3 2 1 6 7 8 9 10 for related documents www.vishay.com/ppg?68641 n -channel mosfet g d s notes: a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. see solder profile ( www.vishay.com/ppg?73257 ). the polarpak is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufactu ring. a solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate botto m side solder interconnection. e. rework conditions: manual soldering with a sold ering iron is not recommended for leadless components. absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 60 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) t c = 25 c i d 95 (silicon limit) a 60 a (package limit) t c = 70 c 60 a t a = 25 c 19.8 b, c t a = 70 c 14.8 b, c pulsed drain current i dm 60 continuous source-drain diode current t c = 25 c i s 60 a t a = 25 c 4.3 b, c single pulse avalanche current l = 0.1 mh i as 50 single pulse avalanche energy e as 125 mj maximum power dissipation t c = 25 c p d 125 w t c = 70 c 80 t a = 25 c 5.2 b, c t a = 70 c 3.3 b, c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d, e 260
www.vishay.com 2 document number: 68641 s09-1337-rev. b, 13-jul-09 vishay siliconix SIE816DF new product notes: a. surface mounted on 1" x 1" fr4 board. b. maximum under steady stat e conditions is 68 c/w. c. measured at source pin ( on the side of the package). notes: a. pulse test; pulse width 300 s, duty cycle 2 % b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a, b t 10 s r thja 20 24 c/w maximum junction-to-case (drain top) steady state r thjc (drain) 0.8 1 maximum junction-to-case (source) a, c r thjc (source) 2.2 2.7 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 60 v v ds temperature coefficient v ds /t j i d = 250 a 70 mv/c v gs(th) temperature coefficient v gs(th) /t j - 9 gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.5 4.4 v gate-source leakage i gss v ds = 0 v, v gs = 20 v 100 na zero gate voltage drain current i dss v ds = 60 v, v gs = 0 v 1 a v ds = 60 v, v gs = 0 v, t j = 55 c 10 on-state drain current a i d(on) v ds 5 v, v gs = 10 v 25 a drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 19.8 a 0.0061 0.0074 forward transconductance a g fs v ds = 15 v, i d = 19.8 a 30 s dynamic b input capacitance c iss v ds = 30 v, v gs = 0 v, f = 1 mhz 3100 pf output capacitance c oss 480 reverse transfer capacitance c rss 180 total gate charge q g v ds = 30 v, v gs = 10 v, i d = 19.8 a 51 77 nc gate-source charge q gs 19 gate-drain charge q gd 15 gate resistance r g f = 1 mhz 1.1 2.2 tu r n - o n d e l ay t i m e t d(on) v dd = 30 v, r l = 3 i d ? 10 a, v gen = 10 v, r g = 1 22 30 ns rise time t r 10 15 turn-off delay time t d(off) 25 40 fall time t f 10 15 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c 60 a pulse diode forward current a i sm 60 body diode voltage v sd i s = 10 a 0.8 1.2 v body diode reverse recovery time t rr i f = 10 a, di/dt = 100 a/s, t j = 25 c 60 90 ns body diode reverse recovery charge q rr 135 205 nc reverse recovery fall time t a 42 ns reverse recovery rise time t b 18
document number: 68641 s09-1337-rev. b, 13-jul-09 www.vishay.com 3 vishay siliconix SIE816DF new product typical characteristics 25 c, unless otherwise noted output characteristics on-resistance vs. drain current and gate voltage gate charge 0 10 20 30 40 50 60 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v ds - drain-to-so u rce v oltage ( v ) - drain c u rrent (a) i d v gs =10 v thr u8v v gs =5 v v gs =7 v v gs =6 v 0.0050 0.0055 0.0060 0.0065 0.0070 0.0075 0204060 - on-resistance ( ) r ds(on) i d - drain c u rrent (a) v gs =10 v 0 2 4 6 8 10 0 102030405060 - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v gs v ds =30 v v ds =30 v i d = 19. 8 a transfer characteristics capacitance on-resistance vs. junction temperature 0 4 8 12 16 20 01234567 v gs - gate-to-so u rce v oltage ( v ) - drain c u rrent (a) i d t c = 25 c t c = 125 c t c = - 55 c 0 500 1000 1500 2000 2500 3000 3500 4000 0 102030405060 c iss v ds - drain-to-so u rce v oltage ( v ) c - capacitance (pf) c oss c rss 0.6 0. 8 1.0 1.2 1.4 1.6 1. 8 - 50 - 25 0 25 50 75 100 125 150 t j -j u nction temperat u re (c) ( n ormalized) - on-resistance r ds(on) v gs =10 v ,i d =19. 8 a
www.vishay.com 4 document number: 68641 s09-1337-rev. b, 13-jul-09 vishay siliconix SIE816DF new product typical characteristics 25 c, unless otherwise noted source-drain diode forward voltage threshold voltage 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 t j = 150 c 10 v sd -so u rce-to-drain v oltage ( v ) - so u rce c u rrent (a) i s 1 100 t j = 25 c 2.0 2.4 2. 8 3.2 3.6 4.0 4.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a ( v ) v gs(th) t j - temperat u re (c) on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.000 0.005 0.010 0.015 0.020 4567 8 910 - on-resistance ( ) r ds(on) v gs - gate-to-so u rce v oltage ( v ) t j =25 c t j = 125 c i d =19. 8 a 0 30 50 10 20 ) w ( r e w o p time (s) 40 10 1000 1 0.1 0.01 100 safe operating area, junction-to-ambient 0.01 100 1 100 0.01 - drain c u rrent (a) i d 0.1 v ds - drain-to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified 1ms 10 ms 100 ms 0.1 1 10 10 t a = 25 c single p u lse limited b yr ds(on) * 1s dc 10 s b v dss limited 100 s
document number: 68641 s09-1337-rev. b, 13-jul-09 www.vishay.com 5 vishay siliconix SIE816DF new product typical characteristics 25 c, unless otherwise noted * the power dissipation p d is based on t j(max) = 150 c, using junction-to-case thermal resi stance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determ ine the current rating, when this rating falls below the package limit. current derating* 0 20 40 60 8 0 100 120 0 255075100125150 t c - case temperat u re (c) i d - drain c u rrent (a) package limited power derating, junction-to-case 0 20 40 60 8 0 100 120 140 25 50 75 100 125 150 t c - case temperat u re (c) ) w ( n o i t a p i s s i d r e w o p
www.vishay.com 6 document number: 68641 s09-1337-rev. b, 13-jul-09 vishay siliconix SIE816DF new product typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?68641 . normalized thermal transient im pedance, junction-to-ambient 10 -3 10 -2 1 10 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single p u lse d u ty cycle = 0.5 s qu are w a v e p u lse d u ration (s) t n e i s n a r t e v i t c e f f e d e z i l a m r o n e c n a d e p m i l a m r e h t 1. d u ty cycle, d = 2. per unit base = r thja = 55 c/ w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 n otes: 4. s u rface mo u nted p dm normalized thermal transient impedance, junction-to-case (drain top) 10 -3 10 -2 1 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 d u ty cycle = 0.5 s qu are w a v e p u lse d u ration (s) t n e i s n a r t e v i t c e f f e d e z i l a m r o n e c n a d e p m i l a m r e h t 0.02 single p u lse
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