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Alliance Semiconductor ...
ALSC[Alliance Semiconductor Corporation]
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| Part No. |
ASM4SSTVF32852 ASM4SSTVF32852-114BT ASM4ISSTVF32852-114BR ASM4ISSTVF32852-114BT ASM4SSTVF32852-114BR
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| OCR Text |
differential clock signals. Supports SSTL_2 class II specifications on inputs and outputs. Low voltage operation. VDD = 2.3V to 2.7V.
T...lvcmos RESETB input. Data flow from D to Q is controlled by the differential clock (CLK/CLKB) and a ... |
| Description |
DDR 24-Bit to 48-Bit Registered Buffer
SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114
Specialty Clock Management
2.3 V -2.7 V, DDR 24-bit to 48-bit registered buffer
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| File Size |
106.12K /
13 Page |
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it Online |
Download Datasheet
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IDT
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| Part No. |
IDT74SSTVF16857
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| OCR Text |
...ass I style data inputs/outputs differential CLK input RESET control compatible with lvcmos levels Flow-through architecture for optimum PCB design Drive up to equivalent of 14 SDRAM loads Latch-up performance exceeds 100mA ESD >2000V per M... |
| Description |
14-BIT REGISTERED BUFFER
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| File Size |
52.11K /
6 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT74SSTVF16859
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| OCR Text |
...ass I style data inputs/outputs differential CLK input RESET control compatible with lvcmos levels Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0) * Available in 56 pi... |
| Description |
13-BIT TO 26-BIT REGISTERED BUFFER
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| File Size |
62.52K /
7 Page |
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it Online |
Download Datasheet |
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