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differential lvcmos Datasheet PDF File

For differential lvcmos Found Datasheets File :: 3364 Search Time::1.609ms
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				Hynix Semiconductor
Part No.	H5MS5162DFR-K3M H5MS5162DFR-E3M H5MS5162DFR-J3M H5MS5162DFR-L3M
OCR Text	...he DPD feature INPUT CLOCK - differential clock inputs (CK, CK) Operating Temperature Data MASK - LDM and UDM: Input mask signals for ...lvcmos. Read and write accesses to the Low Power DDR SDRAM (Mobile DDR SDRAM) are burst oriented; ac...
Description	512Mb (32Mx16bit) Mobile DDR SDRAM
File Size	1,323.43K / 62 Page	View it Online	Download Datasheet

				Philips Semiconductors
Part No.	SSTUH32864
OCR Text	... the sstuh32864 operates from a differential clock (ck and ck). data are registered at the crossing of ck going high, and ck going low. the ...lvcmos reset and cn inputs must always be held at a valid logic high or low level. to ensure de?ned ...
Description	1.8 V high output drive configurable registered buffer
File Size	137.98K / 20 Page	View it Online	Download Datasheet

				Motorola, Inc MOTOROLA[Motorola Inc]
Part No.	MC12439 MC12439FN
OCR Text	...uencies from 400 to 800MHz. The differential PECL output can be configured to be the VCO frequency divided by 1, 2, 4, or 8. With the output...lvcmos input can also be used as the PLL reference. The reference is selected via the XTAL_SEL input...
Description	HIGH FREQUENCY PLL CLOCK GENERATOR
File Size	129.32K / 11 Page	View it Online	Download Datasheet

				Philips Semiconductors
Part No.	SSTUH32866
OCR Text	...rrect parity error processing n differential clock (ck and ck) inputs sstuh32866 1.8 v high output drive 25-bit 1 : 1 or 14-bit 1 : 2 con?gu...lvcmos switching levels on the control and reset inputs n single 1.8 v supply operation n available ...
Description	1.8 V high output drive 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer
File Size	182.79K / 28 Page	View it Online	Download Datasheet

				ICS
Part No.	ICS43002I-41
OCR Text	...accept either a single-ended or differential input. each input port also includes an activity detector circuit, which reports input clock ac...lvcmos or lvttl levels ? maximum output frequency: 700mhz ? femtoclock vco frequency range: 560mhz...
Description	FEMTOCLOCKS-TM VCXO BASED SONET/SDH JITTER ATTENUATOR
File Size	294.72K / 21 Page	View it Online	Download Datasheet

				Integrated Circuit Systems
Part No.	ICS5314I-01
OCR Text	...skew, high perfor- mance 1-to-5 differential-to-2.5v/3.3v lvpecl fanout buffer and a member of the hiperclocks? family of high performance c...lvcmos or lvttl input levels. the clock enable is internally synchronized to eliminate runt clock pu...
Description	differential-TO-2.5V/3.3V LVPECL FANOUT BUFFER
File Size	289.00K / 19 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	PCK953BD PCK953
OCR Text	...gns. The devices employ a fully differential PLL design to minimize cycle-to-cycle and phase jitter. The PCK953 has a differential LVPECL re...lvcmos or LVTTL compatible levels, while the outputs provide lvcmos levels with the ability to drive...
Description	50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver
File Size	65.55K / 8 Page	View it Online	Download Datasheet

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