| |
|
 |
NEC, Corp.
|
| Part No. |
UPD16855C UPD16855BG
|
| OCR Text |
...tput 10 m s over current detect delay time t over 520 m s ctl input low-level time (only m pd16855a/c) t ctl ctl : h ? l ? h20 m s ctl inpu...locked out (uvlo) circuit uvlo is the circuit for preventing malfunction of the switch by voltage va... |
| Description |
UPD16855A/B/C/D Data Sheet | Data Sheet[02/1999] UPD16855A/B/C/D数据表|数据表[02/1999]
DUAL HIGH-SIDE SWITCH FOR USB APPLICATION 双高边开关的USB应用
|
| File Size |
128.32K /
28 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Mitel Networks, Corp.
|
| Part No. |
MT9041BP
|
| OCR Text |
...terface circuit uses two tapped delay lines followed by a t1 divider circuit and an e1 divider circuit to generate the required output signa...locked to one another for all operating states, and are also locked to the selected input reference ... |
| Description |
T1/E1 System Synchronizer T1/E1的系统同
|
| File Size |
76.88K /
19 Page |
View
it Online |
Download Datasheet |
| |
|
|
ZARLINK[Zarlink Semiconductor Inc]
|
| Part No. |
MT9046AN MT9046
|
| OCR Text |
...tor Inc.
MT9046
TCLR Resets Delay Control Circuit Control Signal
Data Sheet
Delay Value
PRI or SEC from Reference Select Mux
...locked to the selected input reference signal. In Holdover Mode, the DCO is free running at a freque... |
| Description |
T1/E1 System Synchronizer with Holdover
|
| File Size |
300.45K /
34 Page |
View
it Online |
Download Datasheet |
| |
|
|
PERICOM[Pericom Semiconductor Corporation]
|
| Part No. |
PI6C2401WE PI6C2401 PI6C2401W
|
| OCR Text |
...ications * Zero Input-to-Output delay * Low jitter: Cycle-to-Cycle jitter 100ps max. * On-chip series damping resistor at clock output driv...locked loop (PLL) clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN inpu... |
| Description |
6C SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Phase-Locked Loop Clock Driver
|
| File Size |
62.97K /
4 Page |
View
it Online |
Download Datasheet |
| |
|
|
PERICOM[Pericom Semiconductor Corporation]
|
| Part No. |
PI6C2501W PI6C2501
|
| OCR Text |
...eduction * Zero Input-to-Output delay * Low jitter: Cycle-to-Cycle jitter 100ps max. * On-chip series damping resistor at clock output drive...locked loop (PLL) clock driver. By connecting the CLK_OUT output to the feedback FB_IN input, the pr... |
| Description |
Phase-Locked Loop Clock Driver
|
| File Size |
202.16K /
4 Page |
View
it Online |
Download Datasheet |
| |
|
|
PHILIPS[Philips Semiconductors]
|
| Part No. |
SAA5355
|
| OCR Text |
... to UDS fall AS LOW to UDS fall delay UDS, LDS HIGH time UDS, LDS LOW time AS HIGH time AS LOW time tcyc tSAA tASU tASH tAFS tATD tHDS tLDS ...locked slave
SAA5355
The phase-locked slave (indirect sync) mode is shown in Fig.26. A phase-l... |
| Description |
Single-chip colour CRT controller FTFROM
|
| File Size |
335.25K /
31 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
